fp.isa (7387:079af601946a) fp.isa (7388:293878a9d220)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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928 header_output += VfpRegRegOpDeclare.subst(vcvtSIntFpDIop);
929 decoder_output += VfpRegRegOpConstructor.subst(vcvtSIntFpDIop);
930 exec_output += PredOpExecute.subst(vcvtSIntFpDIop);
931
932 vcvtFpUIntSRCode = '''
933 vfpFlushToZero(Fpscr, FpOp1);
934 VfpSavedState state = prepVfpFpscr(Fpscr);
935 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 919 unchanged lines hidden (view full) ---

928 header_output += VfpRegRegOpDeclare.subst(vcvtSIntFpDIop);
929 decoder_output += VfpRegRegOpConstructor.subst(vcvtSIntFpDIop);
930 exec_output += PredOpExecute.subst(vcvtSIntFpDIop);
931
932 vcvtFpUIntSRCode = '''
933 vfpFlushToZero(Fpscr, FpOp1);
934 VfpSavedState state = prepVfpFpscr(Fpscr);
935 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
936 FpDest.uw = vfpFpSToFixed(FpOp1, false, false, 0);
936 FpDest.uw = vfpFpSToFixed(FpOp1, false, false, 0, false);
937 __asm__ __volatile__("" :: "m" (FpDest.uw));
938 Fpscr = setVfpFpscr(Fpscr, state);
939 '''
940 vcvtFpUIntSRIop = InstObjParams("vcvt", "VcvtFpUIntSR", "VfpRegRegOp",
941 { "code": vcvtFpUIntSRCode,
942 "predicate_test": predicateTest }, [])
943 header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntSRIop);
944 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntSRIop);
945 exec_output += PredOpExecute.subst(vcvtFpUIntSRIop);
946
947 vcvtFpUIntDRCode = '''
948 IntDoubleUnion cOp1;
949 cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
950 vfpFlushToZero(Fpscr, cOp1.fp);
951 VfpSavedState state = prepVfpFpscr(Fpscr);
952 __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
937 __asm__ __volatile__("" :: "m" (FpDest.uw));
938 Fpscr = setVfpFpscr(Fpscr, state);
939 '''
940 vcvtFpUIntSRIop = InstObjParams("vcvt", "VcvtFpUIntSR", "VfpRegRegOp",
941 { "code": vcvtFpUIntSRCode,
942 "predicate_test": predicateTest }, [])
943 header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntSRIop);
944 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntSRIop);
945 exec_output += PredOpExecute.subst(vcvtFpUIntSRIop);
946
947 vcvtFpUIntDRCode = '''
948 IntDoubleUnion cOp1;
949 cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
950 vfpFlushToZero(Fpscr, cOp1.fp);
951 VfpSavedState state = prepVfpFpscr(Fpscr);
952 __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
953 uint64_t result = vfpFpDToFixed(cOp1.fp, false, false, 0);
953 uint64_t result = vfpFpDToFixed(cOp1.fp, false, false, 0, false);
954 __asm__ __volatile__("" :: "m" (result));
955 Fpscr = setVfpFpscr(Fpscr, state);
956 FpDestP0.uw = result;
957 '''
958 vcvtFpUIntDRIop = InstObjParams("vcvtr", "VcvtFpUIntDR", "VfpRegRegOp",
959 { "code": vcvtFpUIntDRCode,
960 "predicate_test": predicateTest }, [])
961 header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntDRIop);
962 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntDRIop);
963 exec_output += PredOpExecute.subst(vcvtFpUIntDRIop);
964
965 vcvtFpSIntSRCode = '''
966 vfpFlushToZero(Fpscr, FpOp1);
967 VfpSavedState state = prepVfpFpscr(Fpscr);
968 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
954 __asm__ __volatile__("" :: "m" (result));
955 Fpscr = setVfpFpscr(Fpscr, state);
956 FpDestP0.uw = result;
957 '''
958 vcvtFpUIntDRIop = InstObjParams("vcvtr", "VcvtFpUIntDR", "VfpRegRegOp",
959 { "code": vcvtFpUIntDRCode,
960 "predicate_test": predicateTest }, [])
961 header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntDRIop);
962 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntDRIop);
963 exec_output += PredOpExecute.subst(vcvtFpUIntDRIop);
964
965 vcvtFpSIntSRCode = '''
966 vfpFlushToZero(Fpscr, FpOp1);
967 VfpSavedState state = prepVfpFpscr(Fpscr);
968 __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
969 FpDest.sw = vfpFpSToFixed(FpOp1, true, false, 0);
969 FpDest.sw = vfpFpSToFixed(FpOp1, true, false, 0, false);
970 __asm__ __volatile__("" :: "m" (FpDest.sw));
971 Fpscr = setVfpFpscr(Fpscr, state);
972 '''
973 vcvtFpSIntSRIop = InstObjParams("vcvtr", "VcvtFpSIntSR", "VfpRegRegOp",
974 { "code": vcvtFpSIntSRCode,
975 "predicate_test": predicateTest }, [])
976 header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntSRIop);
977 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntSRIop);
978 exec_output += PredOpExecute.subst(vcvtFpSIntSRIop);
979
980 vcvtFpSIntDRCode = '''
981 IntDoubleUnion cOp1;
982 cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
983 vfpFlushToZero(Fpscr, cOp1.fp);
984 VfpSavedState state = prepVfpFpscr(Fpscr);
985 __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
970 __asm__ __volatile__("" :: "m" (FpDest.sw));
971 Fpscr = setVfpFpscr(Fpscr, state);
972 '''
973 vcvtFpSIntSRIop = InstObjParams("vcvtr", "VcvtFpSIntSR", "VfpRegRegOp",
974 { "code": vcvtFpSIntSRCode,
975 "predicate_test": predicateTest }, [])
976 header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntSRIop);
977 decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntSRIop);
978 exec_output += PredOpExecute.subst(vcvtFpSIntSRIop);
979
980 vcvtFpSIntDRCode = '''
981 IntDoubleUnion cOp1;
982 cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
983 vfpFlushToZero(Fpscr, cOp1.fp);
984 VfpSavedState state = prepVfpFpscr(Fpscr);
985 __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp));
986 int64_t result = vfpFpDToFixed(cOp1.fp, true, false, 0);
986 int64_t result = vfpFpDToFixed(cOp1.fp, true, false, 0, false);
987 __asm__ __volatile__("" :: "m" (result));
988 Fpscr = setVfpFpscr(Fpscr, state);
989 FpDestP0.uw = result;
990 '''
991 vcvtFpSIntDRIop = InstObjParams("vcvtr", "VcvtFpSIntDR", "VfpRegRegOp",
992 { "code": vcvtFpSIntDRCode,
993 "predicate_test": predicateTest }, [])
994 header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntDRIop);

--- 476 unchanged lines hidden --- 		987 __asm__ __volatile__("" :: "m" (result));
988 Fpscr = setVfpFpscr(Fpscr, state);
989 FpDestP0.uw = result;
990 '''
991 vcvtFpSIntDRIop = InstObjParams("vcvtr", "VcvtFpSIntDR", "VfpRegRegOp",
992 { "code": vcvtFpSIntDRCode,
993 "predicate_test": predicateTest }, [])
994 header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntDRIop);

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