fp.isa (7322:49cfb31a2fb7) fp.isa (7324:83dbdfec41ec)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 35 unchanged lines hidden (view full) ---

44 exec_output = ""
45
46 vmsrIop = InstObjParams("vmsr", "Vmsr", "RegRegOp",
47 { "code": "MiscDest = Op1;",
48 "predicate_test": predicateTest }, [])
49 header_output += RegRegOpDeclare.subst(vmsrIop);
50 decoder_output += RegRegOpConstructor.subst(vmsrIop);
51 exec_output += PredOpExecute.subst(vmsrIop);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 35 unchanged lines hidden (view full) ---

44 exec_output = ""
45
46 vmsrIop = InstObjParams("vmsr", "Vmsr", "RegRegOp",
47 { "code": "MiscDest = Op1;",
48 "predicate_test": predicateTest }, [])
49 header_output += RegRegOpDeclare.subst(vmsrIop);
50 decoder_output += RegRegOpConstructor.subst(vmsrIop);
51 exec_output += PredOpExecute.subst(vmsrIop);
52
53 vmrsIop = InstObjParams("vmrs", "Vmrs", "RegRegOp",
54 { "code": "Dest = MiscOp1;",
55 "predicate_test": predicateTest }, [])
56 header_output += RegRegOpDeclare.subst(vmrsIop);
57 decoder_output += RegRegOpConstructor.subst(vmrsIop);
58 exec_output += PredOpExecute.subst(vmrsIop);
52}};
59}};