fp.isa (12106:7784fac1b159) | fp.isa (12236:126ac9da6050) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 46 unchanged lines hidden (view full) --- 55 if (i == 0) 56 mode = VfpFirstMicroop; 57 else if (i == numMicroops - 1) 58 mode = VfpLastMicroop; 59 microOps[i] = new Micro(_machInst, _dest, _op1, mode); 60 nextIdxs(_dest, _op1); 61 } 62 } | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 46 unchanged lines hidden (view full) --- 55 if (i == 0) 56 mode = VfpFirstMicroop; 57 else if (i == numMicroops - 1) 58 mode = VfpLastMicroop; 59 microOps[i] = new Micro(_machInst, _dest, _op1, mode); 60 nextIdxs(_dest, _op1); 61 } 62 } |
63 64 %(BasicExecPanic)s | |
65}; 66 67template <class VfpOp> 68StaticInstPtr 69decodeVfpRegRegOp(ExtMachInst machInst, 70 IntRegIndex dest, IntRegIndex op1, bool wide) 71{ 72 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 91 if (i == 0) 92 mode = VfpFirstMicroop; 93 else if (i == numMicroops - 1) 94 mode = VfpLastMicroop; 95 microOps[i] = new Micro(_machInst, _dest, _imm, mode); 96 nextIdxs(_dest); 97 } 98 } | 63}; 64 65template <class VfpOp> 66StaticInstPtr 67decodeVfpRegRegOp(ExtMachInst machInst, 68 IntRegIndex dest, IntRegIndex op1, bool wide) 69{ 70 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 89 if (i == 0) 90 mode = VfpFirstMicroop; 91 else if (i == numMicroops - 1) 92 mode = VfpLastMicroop; 93 microOps[i] = new Micro(_machInst, _dest, _imm, mode); 94 nextIdxs(_dest); 95 } 96 } |
99 100 %(BasicExecPanic)s | |
101}; 102 103template <class VfpOp> 104StaticInstPtr 105decodeVfpRegImmOp(ExtMachInst machInst, 106 IntRegIndex dest, uint64_t imm, bool wide) 107{ 108 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 127 if (i == 0) 128 mode = VfpFirstMicroop; 129 else if (i == numMicroops - 1) 130 mode = VfpLastMicroop; 131 microOps[i] = new Micro(_machInst, _dest, _op1, _imm, mode); 132 nextIdxs(_dest, _op1); 133 } 134 } | 97}; 98 99template <class VfpOp> 100StaticInstPtr 101decodeVfpRegImmOp(ExtMachInst machInst, 102 IntRegIndex dest, uint64_t imm, bool wide) 103{ 104 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 123 if (i == 0) 124 mode = VfpFirstMicroop; 125 else if (i == numMicroops - 1) 126 mode = VfpLastMicroop; 127 microOps[i] = new Micro(_machInst, _dest, _op1, _imm, mode); 128 nextIdxs(_dest, _op1); 129 } 130 } |
135 136 %(BasicExecPanic)s | |
137}; 138 139template <class VfpOp> 140StaticInstPtr 141decodeVfpRegRegImmOp(ExtMachInst machInst, IntRegIndex dest, 142 IntRegIndex op1, uint64_t imm, bool wide) 143{ 144 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 163 if (i == 0) 164 mode = VfpFirstMicroop; 165 else if (i == numMicroops - 1) 166 mode = VfpLastMicroop; 167 microOps[i] = new Micro(_machInst, _dest, _op1, _op2, mode); 168 nextIdxs(_dest, _op1, _op2); 169 } 170 } | 131}; 132 133template <class VfpOp> 134StaticInstPtr 135decodeVfpRegRegImmOp(ExtMachInst machInst, IntRegIndex dest, 136 IntRegIndex op1, uint64_t imm, bool wide) 137{ 138 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 18 unchanged lines hidden (view full) --- 157 if (i == 0) 158 mode = VfpFirstMicroop; 159 else if (i == numMicroops - 1) 160 mode = VfpLastMicroop; 161 microOps[i] = new Micro(_machInst, _dest, _op1, _op2, mode); 162 nextIdxs(_dest, _op1, _op2); 163 } 164 } |
171 172 %(BasicExecPanic)s | |
173}; 174 175template <class VfpOp> 176StaticInstPtr 177decodeVfpRegRegRegOp(ExtMachInst machInst, IntRegIndex dest, 178 IntRegIndex op1, IntRegIndex op2, bool wide) 179{ 180 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 1602 unchanged lines hidden --- | 165}; 166 167template <class VfpOp> 168StaticInstPtr 169decodeVfpRegRegRegOp(ExtMachInst machInst, IntRegIndex dest, 170 IntRegIndex op1, IntRegIndex op2, bool wide) 171{ 172 if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { --- 1602 unchanged lines hidden --- |