1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 292 unchanged lines hidden (view full) --- 301 FpDestP1.uw = cDest.bits >> 32; 302 ''' 303 vabsDIop = InstObjParams("vabsd", "VabsD", "RegRegOp", 304 { "code": vabsDCode, 305 "predicate_test": predicateTest }, []) 306 header_output += RegRegOpDeclare.subst(vabsDIop); 307 decoder_output += RegRegOpConstructor.subst(vabsDIop); 308 exec_output += PredOpExecute.subst(vabsDIop); |
309 310 vaddSCode = ''' 311 FpDest = FpOp1 + FpOp2; 312 ''' 313 vaddSIop = InstObjParams("vadds", "VaddS", "RegRegRegOp", 314 { "code": vaddSCode, 315 "predicate_test": predicateTest }, []) 316 header_output += RegRegRegOpDeclare.subst(vaddSIop); 317 decoder_output += RegRegRegOpConstructor.subst(vaddSIop); 318 exec_output += PredOpExecute.subst(vaddSIop); 319 320 vaddDCode = ''' 321 IntDoubleUnion cOp1, cOp2, cDest; 322 cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 323 cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 324 cDest.fp = cOp1.fp + cOp2.fp; 325 FpDestP0.uw = cDest.bits; 326 FpDestP1.uw = cDest.bits >> 32; 327 ''' 328 vaddDIop = InstObjParams("vaddd", "VaddD", "RegRegRegOp", 329 { "code": vaddDCode, 330 "predicate_test": predicateTest }, []) 331 header_output += RegRegRegOpDeclare.subst(vaddDIop); 332 decoder_output += RegRegRegOpConstructor.subst(vaddDIop); 333 exec_output += PredOpExecute.subst(vaddDIop); |
334}}; |