680a681,705
>
> vcvtFpSFpDCode = '''
> IntDoubleUnion cDest;
> cDest.fp = FpOp1;
> FpDestP0.uw = cDest.bits;
> FpDestP1.uw = cDest.bits >> 32;
> '''
> vcvtFpSFpDIop = InstObjParams("vcvt", "VcvtFpSFpD", "RegRegOp",
> { "code": vcvtFpSFpDCode,
> "predicate_test": predicateTest }, [])
> header_output += RegRegOpDeclare.subst(vcvtFpSFpDIop);
> decoder_output += RegRegOpConstructor.subst(vcvtFpSFpDIop);
> exec_output += PredOpExecute.subst(vcvtFpSFpDIop);
>
> vcvtFpDFpSCode = '''
> IntDoubleUnion cOp1;
> cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32));
> FpDest = cOp1.fp;
> '''
> vcvtFpDFpSIop = InstObjParams("vcvt", "VcvtFpDFpS", "RegRegOp",
> { "code": vcvtFpDFpSCode,
> "predicate_test": predicateTest }, [])
> header_output += RegRegOpDeclare.subst(vcvtFpDFpSIop);
> decoder_output += RegRegOpConstructor.subst(vcvtFpDFpSIop);
> exec_output += PredOpExecute.subst(vcvtFpDFpSIop);