1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
--- 467 unchanged lines hidden (view full) ---
476 FpDestP1.uw = cDest.bits >> 32;
477 '''
478 vmlsDIop = InstObjParams("vmlsd", "VmlsD", "RegRegRegOp",
479 { "code": vmlsDCode,
480 "predicate_test": predicateTest }, [])
481 header_output += RegRegRegOpDeclare.subst(vmlsDIop);
482 decoder_output += RegRegRegOpConstructor.subst(vmlsDIop);
483 exec_output += PredOpExecute.subst(vmlsDIop);
484}};
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
--- 467 unchanged lines hidden (view full) ---
476 FpDestP1.uw = cDest.bits >> 32;
477 '''
478 vmlsDIop = InstObjParams("vmlsd", "VmlsD", "RegRegRegOp",
479 { "code": vmlsDCode,
480 "predicate_test": predicateTest }, [])
481 header_output += RegRegRegOpDeclare.subst(vmlsDIop);
482 decoder_output += RegRegRegOpConstructor.subst(vmlsDIop);
483 exec_output += PredOpExecute.subst(vmlsDIop);
484}};