data.isa (8301:858384f3af1c) data.isa (8302:9f23d01421de)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 34 unchanged lines hidden (view full) ---

43 decoder_output = ""
44 exec_output = ""
45
46 calcGECode = '''
47 CondCodesGE = insertBits(0, 19, 16, resTemp);
48 '''
49
50 calcQCode = '''
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 34 unchanged lines hidden (view full) ---

43 decoder_output = ""
44 exec_output = ""
45
46 calcGECode = '''
47 CondCodesGE = insertBits(0, 19, 16, resTemp);
48 '''
49
50 calcQCode = '''
51 CondCodesQ = CondCodesQ | ((resTemp & 1) << 27);
51 CpsrQ = (resTemp & 1) << 27;
52 '''
53
54 calcCcCode = '''
55 uint16_t _ic, _iv, _iz, _in;
56 _in = (resTemp >> %(negBit)d) & 1;
57 _iz = (resTemp == 0);
58 _iv = %(ivValue)s & 1;
59 _ic = %(icValue)s & 1;

--- 174 unchanged lines hidden (view full) ---

234 buildImmDataInst(mnem, instCode, flagType)
235 buildRegDataInst(mnem, instCode, flagType,
236 isRasPop = isRasPop, isBranch = isBranch)
237 buildRegRegDataInst(mnem, regRegCode, flagType)
238 if subsPcLr:
239 code += '''
240 SCTLR sctlr = Sctlr;
241 uint32_t newCpsr =
52 '''
53
54 calcCcCode = '''
55 uint16_t _ic, _iv, _iz, _in;
56 _in = (resTemp >> %(negBit)d) & 1;
57 _iz = (resTemp == 0);
58 _iv = %(ivValue)s & 1;
59 _ic = %(icValue)s & 1;

--- 174 unchanged lines hidden (view full) ---

234 buildImmDataInst(mnem, instCode, flagType)
235 buildRegDataInst(mnem, instCode, flagType,
236 isRasPop = isRasPop, isBranch = isBranch)
237 buildRegRegDataInst(mnem, regRegCode, flagType)
238 if subsPcLr:
239 code += '''
240 SCTLR sctlr = Sctlr;
241 uint32_t newCpsr =
242 cpsrWriteByInstr(Cpsr | CondCodesF | CondCodesQ | CondCodesGE,
242 cpsrWriteByInstr(Cpsr | CondCodesF | CondCodesGE,
243 Spsr, 0xF, true, sctlr.nmfi);
244 Cpsr = ~CondCodesMask & newCpsr;
245 CondCodesF = CondCodesMaskF & newCpsr;
243 Spsr, 0xF, true, sctlr.nmfi);
244 Cpsr = ~CondCodesMask & newCpsr;
245 CondCodesF = CondCodesMaskF & newCpsr;
246 CondCodesQ = CondCodesMaskQ & newCpsr;
247 CondCodesGE = CondCodesMaskGE & newCpsr;
248 NextThumb = ((CPSR)newCpsr).t;
249 NextJazelle = ((CPSR)newCpsr).j;
250 NextItState = ((((CPSR)newCpsr).it2 << 2) & 0xFC)
251 | (((CPSR)newCpsr).it1 & 0x3);
252 SevMailbox = 1;
253 '''
254 buildImmDataInst(mnem + 's', code, flagType,

--- 574 unchanged lines hidden --- 		246 CondCodesGE = CondCodesMaskGE & newCpsr;
247 NextThumb = ((CPSR)newCpsr).t;
248 NextJazelle = ((CPSR)newCpsr).j;
249 NextItState = ((((CPSR)newCpsr).it2 << 2) & 0xFC)
250 | (((CPSR)newCpsr).it1 & 0x3);
251 SevMailbox = 1;
252 '''
253 buildImmDataInst(mnem + 's', code, flagType,

--- 574 unchanged lines hidden ---