data.isa (7236:7fdb1714f62e) data.isa (7400:f6c9b27c4dbe)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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228 if regRegAiw:
229 regRegCode = "AIW" + regRegCode
230
231 buildImmDataInst(mnem, instCode, flagType)
232 buildRegDataInst(mnem, instCode, flagType)
233 buildRegRegDataInst(mnem, regRegCode, flagType)
234 if subsPcLr:
235 code += '''
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 219 unchanged lines hidden (view full) ---

228 if regRegAiw:
229 regRegCode = "AIW" + regRegCode
230
231 buildImmDataInst(mnem, instCode, flagType)
232 buildRegDataInst(mnem, instCode, flagType)
233 buildRegRegDataInst(mnem, regRegCode, flagType)
234 if subsPcLr:
235 code += '''
236 SCTLR sctlr = Sctlr;
236 uint32_t newCpsr =
237 uint32_t newCpsr =
237 cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true);
238 cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true, sctlr.nmfi);
238 Cpsr = ~CondCodesMask & newCpsr;
239 CondCodes = CondCodesMask & newCpsr;
240 '''
241 buildImmDataInst(mnem + 's', code, flagType,
242 suffix = "ImmPclr", buildCc = False)
243 buildRegDataInst(mnem + 's', code, flagType,
244 suffix = "RegPclr", buildCc = False)
245

--- 567 unchanged lines hidden --- 		239 Cpsr = ~CondCodesMask & newCpsr;
240 CondCodes = CondCodesMask & newCpsr;
241 '''
242 buildImmDataInst(mnem + 's', code, flagType,
243 suffix = "ImmPclr", buildCc = False)
244 buildRegDataInst(mnem + 's', code, flagType,
245 suffix = "RegPclr", buildCc = False)
246

--- 567 unchanged lines hidden ---