| data.isa (7138:5dff7c15008f) | data.isa (7146:f68d5f1f748c) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 112 unchanged lines hidden (view full) --- 121 regRegCcCode = calcCcCode % { 122 "icValue": secondOpRe.sub(regRegOp2, cCode[2]), 123 "ivValue": secondOpRe.sub(regRegOp2, vCode), 124 "negBit": negBit 125 } 126 immCode = secondOpRe.sub(immOp2, code) 127 regCode = secondOpRe.sub(regOp2, code) 128 regRegCode = secondOpRe.sub(regRegOp2, code) | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 112 unchanged lines hidden (view full) --- 121 regRegCcCode = calcCcCode % { 122 "icValue": secondOpRe.sub(regRegOp2, cCode[2]), 123 "ivValue": secondOpRe.sub(regRegOp2, vCode), 124 "negBit": negBit 125 } 126 immCode = secondOpRe.sub(immOp2, code) 127 regCode = secondOpRe.sub(regOp2, code) 128 regRegCode = secondOpRe.sub(regRegOp2, code) |
| 129 immIop = InstObjParams(mnem, mnem.capitalize() + "DImm", "DataImmOp", | 129 immIop = InstObjParams(mnem, mnem.capitalize() + "Imm", "DataImmOp", |
| 130 {"code" : immCode, 131 "predicate_test": predicateTest}) | 130 {"code" : immCode, 131 "predicate_test": predicateTest}) |
| 132 regIop = InstObjParams(mnem, mnem.capitalize() + "DReg", "DataRegOp", | 132 regIop = InstObjParams(mnem, mnem.capitalize() + "Reg", "DataRegOp", |
| 133 {"code" : regCode, 134 "predicate_test": predicateTest}) | 133 {"code" : regCode, 134 "predicate_test": predicateTest}) |
| 135 regRegIop = InstObjParams(mnem, mnem.capitalize() + "DRegReg", | 135 regRegIop = InstObjParams(mnem, mnem.capitalize() + "RegReg", |
| 136 "DataRegRegOp", 137 {"code" : regRegCode, 138 "predicate_test": predicateTest}) | 136 "DataRegRegOp", 137 {"code" : regRegCode, 138 "predicate_test": predicateTest}) |
| 139 immIopCc = InstObjParams(mnem + "s", mnem.capitalize() + "DImmCc", | 139 immIopCc = InstObjParams(mnem + "s", mnem.capitalize() + "ImmCc", |
| 140 "DataImmOp", 141 {"code" : immCode + immCcCode, 142 "predicate_test": predicateTest}) | 140 "DataImmOp", 141 {"code" : immCode + immCcCode, 142 "predicate_test": predicateTest}) |
| 143 regIopCc = InstObjParams(mnem + "s", mnem.capitalize() + "DRegCc", | 143 regIopCc = InstObjParams(mnem + "s", mnem.capitalize() + "RegCc", |
| 144 "DataRegOp", 145 {"code" : regCode + regCcCode, 146 "predicate_test": predicateTest}) 147 regRegIopCc = InstObjParams(mnem + "s", | 144 "DataRegOp", 145 {"code" : regCode + regCcCode, 146 "predicate_test": predicateTest}) 147 regRegIopCc = InstObjParams(mnem + "s", |
| 148 mnem.capitalize() + "DRegRegCc", | 148 mnem.capitalize() + "RegRegCc", |
| 149 "DataRegRegOp", 150 {"code" : regRegCode + regRegCcCode, 151 "predicate_test": predicateTest}) 152 header_output += DataImmDeclare.subst(immIop) + \ 153 DataImmDeclare.subst(immIopCc) + \ 154 DataRegDeclare.subst(regIop) + \ 155 DataRegDeclare.subst(regIopCc) + \ 156 DataRegRegDeclare.subst(regRegIop) + \ --- 32 unchanged lines hidden --- | 149 "DataRegRegOp", 150 {"code" : regRegCode + regRegCcCode, 151 "predicate_test": predicateTest}) 152 header_output += DataImmDeclare.subst(immIop) + \ 153 DataImmDeclare.subst(immIopCc) + \ 154 DataRegDeclare.subst(regIop) + \ 155 DataRegDeclare.subst(regIopCc) + \ 156 DataRegRegDeclare.subst(regRegIop) + \ --- 32 unchanged lines hidden --- |