branch64.isa (12580:ad7057d38b98) branch64.isa (14172:bba55ff08279)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016,2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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98 decoder_output += BranchReg64Constructor.subst(bIop)
99 exec_output += BasicExecute.subst(bIop)
100
101 # ERET
102 bCode = '''Addr newPc;
103 CPSR cpsr = Cpsr;
104 CPSR spsr = Spsr;
105
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013, 2016,2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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98 decoder_output += BranchReg64Constructor.subst(bIop)
99 exec_output += BasicExecute.subst(bIop)
100
101 # ERET
102 bCode = '''Addr newPc;
103 CPSR cpsr = Cpsr;
104 CPSR spsr = Spsr;
105
106 ExceptionLevel curr_el = opModeToEL((OperatingMode) (uint8_t) cpsr.mode);
106 ExceptionLevel curr_el = currEL(cpsr);
107 switch (curr_el) {
108 case EL3:
109 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL3);
110 break;
111 case EL2:
112 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL2);
113 break;
114 case EL1:

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140 Cpsr = new_cpsr;
141 CondCodesNZ = new_cpsr.nz;
142 CondCodesC = new_cpsr.c;
143 CondCodesV = new_cpsr.v;
144
145 NextAArch64 = !new_cpsr.width;
146 NextItState = itState(new_cpsr);
147 NPC = purifyTaggedAddr(newPc, xc->tcBase(),
107 switch (curr_el) {
108 case EL3:
109 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL3);
110 break;
111 case EL2:
112 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL2);
113 break;
114 case EL1:

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140 Cpsr = new_cpsr;
141 CondCodesNZ = new_cpsr.nz;
142 CondCodesC = new_cpsr.c;
143 CondCodesV = new_cpsr.v;
144
145 NextAArch64 = !new_cpsr.width;
146 NextItState = itState(new_cpsr);
147 NPC = purifyTaggedAddr(newPc, xc->tcBase(),
148 opModeToEL((OperatingMode) (uint8_t) new_cpsr.mode));
148 currEL(new_cpsr));
149
150 LLSCLock = 0; // Clear exclusive monitor
151 SevMailbox = 1; //Set Event Register
152 '''
153 instFlags = ['IsSerializeAfter', 'IsNonSpeculative', 'IsSquashAfter']
154 bIop = InstObjParams('eret', 'Eret64', "BranchEret64", bCode, instFlags)
155 header_output += BasicDeclare.subst(bIop)
156 decoder_output += BasicConstructor64.subst(bIop)

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150 LLSCLock = 0; // Clear exclusive monitor
151 SevMailbox = 1; //Set Event Register
152 '''
153 instFlags = ['IsSerializeAfter', 'IsNonSpeculative', 'IsSquashAfter']
154 bIop = InstObjParams('eret', 'Eret64', "BranchEret64", bCode, instFlags)
155 header_output += BasicDeclare.subst(bIop)
156 decoder_output += BasicConstructor64.subst(bIop)

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