branch64.isa (10037:5cac77888310) branch64.isa (10474:799c8ee4ecba)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 101 unchanged lines hidden (view full) ---

110 break;
111 case EL2:
112 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL2);
113 break;
114 case EL1:
115 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL1);
116 break;
117 default:
1// -*- mode:c++ -*-
2
3// Copyright (c) 2011-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 101 unchanged lines hidden (view full) ---

110 break;
111 case EL2:
112 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL2);
113 break;
114 case EL1:
115 newPc = xc->tcBase()->readMiscReg(MISCREG_ELR_EL1);
116 break;
117 default:
118 return new UndefinedInstruction(machInst, false, mnemonic);
118 return std::make_shared<UndefinedInstruction>(machInst,
119 false,
120 mnemonic);
119 break;
120 }
121 if (spsr.width && (newPc & mask(2))) {
122 // To avoid PC Alignment fault when returning to AArch32
123 if (spsr.t)
124 newPc = newPc & ~mask(1);
125 else
126 newPc = newPc & ~mask(2);

--- 122 unchanged lines hidden --- 		121 break;
122 }
123 if (spsr.width && (newPc & mask(2))) {
124 // To avoid PC Alignment fault when returning to AArch32
125 if (spsr.t)
126 newPc = newPc & ~mask(1);
127 else
128 newPc = newPc & ~mask(2);

--- 122 unchanged lines hidden ---