branch.isa (8146:18368caa8489) branch.isa (8203:78b9f056d58a)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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76 '''
77
78 blxList = (("blx", True, True),
79 ("blx", False, True),
80 ("bx", False, False))
81
82 for (mnem, imm, link) in blxList:
83 Name = mnem.capitalize()
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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76 '''
77
78 blxList = (("blx", True, True),
79 ("blx", False, True),
80 ("bx", False, False))
81
82 for (mnem, imm, link) in blxList:
83 Name = mnem.capitalize()
84 isRasPop = 0
84 if imm:
85 Name += "Imm"
86 # Since we're switching ISAs, the target ISA will be the opposite
87 # of the current ISA. Thumb is whether the target is ARM.
88 newPC = '(Thumb ? (roundDown(PC, 4) + imm) : (PC + imm))'
89 br_tgt_code = '''
90 pcs.instNPC((branchPC.thumb() ? (roundDown(branchPC.instPC(),4) + imm) :
91 (branchPC.instPC() + imm)));

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118 if (Thumb)
119 LR = (PC - 2) | 1;
120 else
121 LR = PC - 4;
122 '''
123 instFlags += ["IsCall"]
124 else:
125 linkStr = ""
85 if imm:
86 Name += "Imm"
87 # Since we're switching ISAs, the target ISA will be the opposite
88 # of the current ISA. Thumb is whether the target is ARM.
89 newPC = '(Thumb ? (roundDown(PC, 4) + imm) : (PC + imm))'
90 br_tgt_code = '''
91 pcs.instNPC((branchPC.thumb() ? (roundDown(branchPC.instPC(),4) + imm) :
92 (branchPC.instPC() + imm)));

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119 if (Thumb)
120 LR = (PC - 2) | 1;
121 else
122 LR = PC - 4;
123 '''
124 instFlags += ["IsCall"]
125 else:
126 linkStr = ""
126 instFlags += ["IsReturn"]
127 isRasPop = "op1 == INTREG_LR"
127
128 if imm and link: #blx with imm
129 branchStr = '''
130 NextThumb = !Thumb;
131 NPC = %(newPC)s;
132 '''
133 br_tgt_code = '''pcs.nextThumb(!branchPC.thumb());\n''' + \
134 br_tgt_code
135 else:
136 branchStr = "IWNPC = %(newPC)s;"
137 branchStr = branchStr % { "newPC" : newPC }
138
139 code = blxCode % {"link": linkStr,
140 "newPC": newPC,
141 "branch": branchStr}
142 blxIop = InstObjParams(mnem, Name, base,
143 {"code": code, "brTgtCode" : br_tgt_code,
128
129 if imm and link: #blx with imm
130 branchStr = '''
131 NextThumb = !Thumb;
132 NPC = %(newPC)s;
133 '''
134 br_tgt_code = '''pcs.nextThumb(!branchPC.thumb());\n''' + \
135 br_tgt_code
136 else:
137 branchStr = "IWNPC = %(newPC)s;"
138 branchStr = branchStr % { "newPC" : newPC }
139
140 code = blxCode % {"link": linkStr,
141 "newPC": newPC,
142 "branch": branchStr}
143 blxIop = InstObjParams(mnem, Name, base,
144 {"code": code, "brTgtCode" : br_tgt_code,
144 "predicate_test": predicateTest}, instFlags)
145 "predicate_test": predicateTest,
146 "is_ras_pop" : isRasPop }, instFlags)
145 header_output += declare.subst(blxIop)
146 decoder_output += constructor.subst(blxIop)
147 exec_output += PredOpExecute.subst(blxIop)
148 if imm:
149 decoder_output += BranchTarget.subst(blxIop)
150
151 #Ignore BXJ for now
152

--- 42 unchanged lines hidden --- 		147 header_output += declare.subst(blxIop)
148 decoder_output += constructor.subst(blxIop)
149 exec_output += PredOpExecute.subst(blxIop)
150 if imm:
151 decoder_output += BranchTarget.subst(blxIop)
152
153 #Ignore BXJ for now
154

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