1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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43////////////////////////////////////////////////////////////////////
44//
45// Output include file directives.
46//
47
48output header {{
49#include <sstream>
50#include <iostream>
51
52#include "arch/arm/insts/branch.hh"
53#include "arch/arm/insts/macromem.hh"
54#include "arch/arm/insts/mem.hh"
55#include "arch/arm/insts/mult.hh"
56#include "arch/arm/insts/pred_inst.hh"
57#include "arch/arm/insts/static_inst.hh"
58#include "arch/arm/isa_traits.hh"
59#include "mem/packet.hh"
60}};
61
62output decoder {{
63#include "arch/arm/faults.hh"
64#include "arch/arm/isa_traits.hh"
65#include "arch/arm/utility.hh"
66#include "base/cprintf.hh"
67#include "base/loader/symtab.hh"
68#include "cpu/thread_context.hh"
69
70using namespace ArmISA;
71}};
72
73output exec {{
74#include "arch/arm/faults.hh"
75#include "arch/arm/isa_traits.hh"
76#include "arch/arm/utility.hh"
77#include "base/condcodes.hh"
78
79#include <cmath>
80#if defined(linux)
81#include <fenv.h>
82#endif
83
84#include "mem/packet.hh"
85#include "mem/packet_access.hh"
86#include "sim/sim_exit.hh"
87
88using namespace ArmISA;
89using std::isnan;
90}};
91