uncond.isa (7314:f254f66afb11) | uncond.isa (7316:bb190cb8ee69) |
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1// Copyright (c) 2010 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 32 unchanged lines hidden (view full) --- 41 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 42 const uint32_t op1 = bits(machInst, 27, 20); 43 if (bits(op1, 7) == 0) { 44 const uint32_t op2 = bits(machInst, 7, 4); 45 if (op1 == 0x10) { 46 if (bits((uint32_t)rn, 0) == 1 && op2 == 0) { 47 return new Setend(machInst, bits(machInst, 9)); 48 } else if (bits((uint32_t)rn, 0) == 0 && bits(op2, 1) == 0) { | 1// Copyright (c) 2010 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 32 unchanged lines hidden (view full) --- 41 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 42 const uint32_t op1 = bits(machInst, 27, 20); 43 if (bits(op1, 7) == 0) { 44 const uint32_t op2 = bits(machInst, 7, 4); 45 if (op1 == 0x10) { 46 if (bits((uint32_t)rn, 0) == 1 && op2 == 0) { 47 return new Setend(machInst, bits(machInst, 9)); 48 } else if (bits((uint32_t)rn, 0) == 0 && bits(op2, 1) == 0) { |
49 return new WarnUnimplemented("cps", machInst); | 49 const bool enable = bits(machInst, 19, 18) == 0x2; 50 const uint32_t mods = bits(machInst, 4, 0) | 51 (bits(machInst, 8, 6) << 5) | 52 (bits(machInst, 17) << 8) | 53 ((enable ? 1 : 0) << 9); 54 return new Cps(machInst, mods); |
50 } 51 } else if (bits(op1, 6, 5) == 0x1) { 52 return new WarnUnimplemented( 53 "Advanced SIMD data-processing", machInst); 54 } else if (bits(op1, 6, 4) == 0x4) { 55 if (bits(op1, 0) == 0) { 56 return new WarnUnimplemented( 57 "Advanced SIMD element or structure load/store", --- 249 unchanged lines hidden --- | 55 } 56 } else if (bits(op1, 6, 5) == 0x1) { 57 return new WarnUnimplemented( 58 "Advanced SIMD data-processing", machInst); 59 } else if (bits(op1, 6, 4) == 0x4) { 60 if (bits(op1, 0) == 0) { 61 return new WarnUnimplemented( 62 "Advanced SIMD element or structure load/store", --- 249 unchanged lines hidden --- |