1// Copyright (c) 2012-2013 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 26 unchanged lines hidden (view full) --- 35// 36// Authors: Giacomo Gabrielli 37// Mbou Eyole 38 39output header {{ 40namespace Aarch64 41{ 42 // AdvSIMD three same |
43 template <typename DecoderFeatures> |
44 StaticInstPtr decodeNeon3Same(ExtMachInst machInst); 45 // AdvSIMD three different |
46 inline StaticInstPtr decodeNeon3Diff(ExtMachInst machInst); |
47 // AdvSIMD two-reg misc |
48 inline StaticInstPtr decodeNeon2RegMisc(ExtMachInst machInst); |
49 // AdvSIMD across lanes |
50 inline StaticInstPtr decodeNeonAcrossLanes(ExtMachInst machInst); |
51 // AdvSIMD copy |
52 inline StaticInstPtr decodeNeonCopy(ExtMachInst machInst); |
53 // AdvSIMD vector x indexed element |
54 template <typename DecoderFeatures> |
55 StaticInstPtr decodeNeonIndexedElem(ExtMachInst machInst); 56 // AdvSIMD modified immediate |
57 inline StaticInstPtr decodeNeonModImm(ExtMachInst machInst); |
58 // AdvSIMD shift by immediate |
59 inline StaticInstPtr decodeNeonShiftByImm(ExtMachInst machInst); |
60 // AdvSIMD TBL/TBX |
61 inline StaticInstPtr decodeNeonTblTbx(ExtMachInst machInst); |
62 // AdvSIMD ZIP/UZP/TRN |
63 inline StaticInstPtr decodeNeonZipUzpTrn(ExtMachInst machInst); |
64 // AdvSIMD EXT |
65 inline StaticInstPtr decodeNeonExt(ExtMachInst machInst); |
66 67 // AdvSIMD scalar three same |
68 inline StaticInstPtr decodeNeonSc3Same(ExtMachInst machInst); |
69 // AdvSIMD scalar three different |
70 inline StaticInstPtr decodeNeonSc3Diff(ExtMachInst machInst); |
71 // AdvSIMD scalar two-reg misc |
72 inline StaticInstPtr decodeNeonSc2RegMisc(ExtMachInst machInst); |
73 // AdvSIMD scalar pairwise |
74 inline StaticInstPtr decodeNeonScPwise(ExtMachInst machInst); |
75 // AdvSIMD scalar copy |
76 inline StaticInstPtr decodeNeonScCopy(ExtMachInst machInst); |
77 // AdvSIMD scalar x indexed element |
78 inline StaticInstPtr decodeNeonScIndexedElem(ExtMachInst machInst); |
79 // AdvSIMD scalar shift by immediate |
80 inline StaticInstPtr decodeNeonScShiftByImm(ExtMachInst machInst); |
81 82 // AdvSIMD load/store |
83 inline StaticInstPtr decodeNeonMem(ExtMachInst machInst); |
84} 85}}; 86 87output decoder {{ 88namespace Aarch64 89{ |
90 template <typename DecoderFeatures> |
91 StaticInstPtr 92 decodeNeon3Same(ExtMachInst machInst) 93 { 94 uint8_t q = bits(machInst, 30); 95 uint8_t u = bits(machInst, 29); 96 uint8_t size = bits(machInst, 23, 22); 97 uint8_t opcode = bits(machInst, 15, 11); 98 --- 1166 unchanged lines hidden (view full) --- 1265 default: 1266 return new Unknown64(machInst); 1267 } 1268 default: 1269 return new Unknown64(machInst); 1270 } 1271 } 1272 |
1273 template <typename DecoderFeatures> |
1274 StaticInstPtr 1275 decodeNeonIndexedElem(ExtMachInst machInst) 1276 { 1277 uint8_t q = bits(machInst, 30); 1278 uint8_t u = bits(machInst, 29); 1279 uint8_t size = bits(machInst, 23, 22); 1280 uint8_t L = bits(machInst, 21); 1281 uint8_t M = bits(machInst, 20); --- 1349 unchanged lines hidden --- |