misc.isa (8068:749581c26e71) | misc.isa (8550:8ac6c1fa657f) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 129 unchanged lines hidden (view full) --- 138 return new WarnUnimplemented( 139 isRead ? "mrc bpiallis" : "mcr bpiallis", machInst); 140 case MISCREG_BPIALL: 141 return new WarnUnimplemented( 142 isRead ? "mrc bpiall" : "mcr bpiall", machInst); 143 case MISCREG_L2LATENCY: 144 return new WarnUnimplemented( 145 isRead ? "mrc l2latency" : "mcr l2latency", machInst); | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 129 unchanged lines hidden (view full) --- 138 return new WarnUnimplemented( 139 isRead ? "mrc bpiallis" : "mcr bpiallis", machInst); 140 case MISCREG_BPIALL: 141 return new WarnUnimplemented( 142 isRead ? "mrc bpiall" : "mcr bpiall", machInst); 143 case MISCREG_L2LATENCY: 144 return new WarnUnimplemented( 145 isRead ? "mrc l2latency" : "mcr l2latency", machInst); |
146 case MISCREG_CRN15: 147 return new WarnUnimplemented( 148 isRead ? "mrc crn15" : "mcr crn15", machInst); |
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146 147 // Write only. 148 case MISCREG_TLBIALLIS: 149 case MISCREG_TLBIMVAIS: 150 case MISCREG_TLBIASIDIS: 151 case MISCREG_TLBIMVAAIS: 152 case MISCREG_ITLBIALL: 153 case MISCREG_ITLBIMVA: --- 51 unchanged lines hidden --- | 149 150 // Write only. 151 case MISCREG_TLBIALLIS: 152 case MISCREG_TLBIMVAIS: 153 case MISCREG_TLBIASIDIS: 154 case MISCREG_TLBIMVAAIS: 155 case MISCREG_ITLBIALL: 156 case MISCREG_ITLBIMVA: --- 51 unchanged lines hidden --- |