misc.isa (7391:475d53c618c7) | misc.isa (7404:bfc74724914e) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 124 unchanged lines hidden (view full) --- 133 isRead ? "mrc bpimva" : "mcr bpimva", machInst); 134 case MISCREG_BPIALLIS: 135 return new WarnUnimplemented( 136 isRead ? "mrc bpiallis" : "mcr bpiallis", machInst); 137 case MISCREG_BPIALL: 138 return new WarnUnimplemented( 139 isRead ? "mrc bpiall" : "mcr bpiall", machInst); 140 case MISCREG_TLBIALLIS: | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 124 unchanged lines hidden (view full) --- 133 isRead ? "mrc bpimva" : "mcr bpimva", machInst); 134 case MISCREG_BPIALLIS: 135 return new WarnUnimplemented( 136 isRead ? "mrc bpiallis" : "mcr bpiallis", machInst); 137 case MISCREG_BPIALL: 138 return new WarnUnimplemented( 139 isRead ? "mrc bpiall" : "mcr bpiall", machInst); 140 case MISCREG_TLBIALLIS: |
141 return new WarnUnimplemented( 142 isRead ? "mrc tlbiallis" : "mcr tlbiallis", machInst); | |
143 case MISCREG_TLBIMVAIS: | 141 case MISCREG_TLBIMVAIS: |
144 return new WarnUnimplemented( 145 isRead ? "mrc tlbimvais" : "mcr tlbimvais", machInst); | |
146 case MISCREG_TLBIASIDIS: | 142 case MISCREG_TLBIASIDIS: |
147 return new WarnUnimplemented( 148 isRead ? "mrc tlbiasidis" : "mcr tlbiasidis", machInst); | |
149 case MISCREG_TLBIMVAAIS: | 143 case MISCREG_TLBIMVAAIS: |
150 return new WarnUnimplemented( 151 isRead ? "mrc tlbimvaais" : "mcr tlbimvaais", machInst); | |
152 case MISCREG_ITLBIALL: | 144 case MISCREG_ITLBIALL: |
153 return new WarnUnimplemented( 154 isRead ? "mrc itlbiall" : "mcr itlbiall", machInst); | |
155 case MISCREG_ITLBIMVA: | 145 case MISCREG_ITLBIMVA: |
156 return new WarnUnimplemented( 157 isRead ? "mrc itlbimva" : "mcr itlbimva", machInst); | |
158 case MISCREG_ITLBIASID: | 146 case MISCREG_ITLBIASID: |
159 return new WarnUnimplemented( 160 isRead ? "mrc itlbiasid" : "mcr itlbiasid", machInst); | |
161 case MISCREG_DTLBIALL: | 147 case MISCREG_DTLBIALL: |
162 return new WarnUnimplemented( 163 isRead ? "mrc dtlbiall" : "mcr dtlbiall", machInst); | |
164 case MISCREG_DTLBIMVA: | 148 case MISCREG_DTLBIMVA: |
165 return new WarnUnimplemented( 166 isRead ? "mrc dtlbimva" : "mcr dtlbimva", machInst); | |
167 case MISCREG_DTLBIASID: | 149 case MISCREG_DTLBIASID: |
168 return new WarnUnimplemented( 169 isRead ? "mrc dtlbiasid" : "mcr dtlbiasid", machInst); | |
170 case MISCREG_TLBIALL: | 150 case MISCREG_TLBIALL: |
171 return new WarnUnimplemented( 172 isRead ? "mrc tlbiall" : "mcr tlbiall", machInst); | |
173 case MISCREG_TLBIMVA: | 151 case MISCREG_TLBIMVA: |
174 return new WarnUnimplemented( 175 isRead ? "mrc tlbimva" : "mcr tlbimva", machInst); | |
176 case MISCREG_TLBIASID: | 152 case MISCREG_TLBIASID: |
177 return new WarnUnimplemented( 178 isRead ? "mrc tlbiasid" : "mcr tlbiasid", machInst); | |
179 case MISCREG_TLBIMVAA: | 153 case MISCREG_TLBIMVAA: |
180 return new WarnUnimplemented( 181 isRead ? "mrc tlbimvaa" : "mcr tlbimvaa", machInst); | 154 if (isRead) { 155 return new Unknown(machInst); 156 } else { 157 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 158 } 159 |
182 default: 183 if (isRead) { 184 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 185 } else { 186 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 187 } 188 } 189 } 190 ''' 191}}; 192 193def format McrMrc15() {{ 194 decode_block = ''' 195 return decodeMcrMrc15(machInst); 196 ''' 197}}; | 160 default: 161 if (isRead) { 162 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 163 } else { 164 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 165 } 166 } 167 } 168 ''' 169}}; 170 171def format McrMrc15() {{ 172 decode_block = ''' 173 return decodeMcrMrc15(machInst); 174 ''' 175}}; |