misc.isa (7268:22f75f96c56c) | misc.isa (7272:105f6d3e1099) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 90 unchanged lines hidden (view full) --- 99 return new WarnUnimplemented( 100 isRead ? "mrc dccisw" : "mcr dcisw", machInst); 101 case MISCREG_DCCIMVAC: 102 return new WarnUnimplemented( 103 isRead ? "mrc dccimvac" : "mcr dcimvac", machInst); 104 case MISCREG_CP15ISB: 105 return new WarnUnimplemented( 106 isRead ? "mrc cp15isb" : "mcr cp15isb", machInst); | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 90 unchanged lines hidden (view full) --- 99 return new WarnUnimplemented( 100 isRead ? "mrc dccisw" : "mcr dcisw", machInst); 101 case MISCREG_DCCIMVAC: 102 return new WarnUnimplemented( 103 isRead ? "mrc dccimvac" : "mcr dcimvac", machInst); 104 case MISCREG_CP15ISB: 105 return new WarnUnimplemented( 106 isRead ? "mrc cp15isb" : "mcr cp15isb", machInst); |
107 case MISCREG_CP15DSB: 108 return new WarnUnimplemented( 109 isRead ? "mrc cp15dsb" : "mcr cp15dsb", machInst); 110 case MISCREG_CP15DMB: 111 return new WarnUnimplemented( 112 isRead ? "mrc cp15dmb" : "mcr cp15dmb", machInst); |
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107 default: 108 if (isRead) { 109 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 110 } else { 111 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 112 } 113 } 114 } 115 ''' 116}}; | 113 default: 114 if (isRead) { 115 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 116 } else { 117 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 118 } 119 } 120 } 121 ''' 122}}; |