misc.isa (7267:fcbf902646a8) | misc.isa (7268:22f75f96c56c) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 87 unchanged lines hidden (view full) --- 96 case NUM_MISCREGS: 97 return new Unknown(machInst); 98 case MISCREG_DCCISW: 99 return new WarnUnimplemented( 100 isRead ? "mrc dccisw" : "mcr dcisw", machInst); 101 case MISCREG_DCCIMVAC: 102 return new WarnUnimplemented( 103 isRead ? "mrc dccimvac" : "mcr dcimvac", machInst); | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 87 unchanged lines hidden (view full) --- 96 case NUM_MISCREGS: 97 return new Unknown(machInst); 98 case MISCREG_DCCISW: 99 return new WarnUnimplemented( 100 isRead ? "mrc dccisw" : "mcr dcisw", machInst); 101 case MISCREG_DCCIMVAC: 102 return new WarnUnimplemented( 103 isRead ? "mrc dccimvac" : "mcr dcimvac", machInst); |
104 case MISCREG_CP15ISB: 105 return new WarnUnimplemented( 106 isRead ? "mrc cp15isb" : "mcr cp15isb", machInst); |
|
104 default: 105 if (isRead) { 106 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 107 } else { 108 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 109 } 110 } 111 } 112 ''' 113}}; | 107 default: 108 if (isRead) { 109 return new Mrc15(machInst, rt, (IntRegIndex)miscReg); 110 } else { 111 return new Mcr15(machInst, (IntRegIndex)miscReg, rt); 112 } 113 } 114 } 115 ''' 116}}; |