misc.isa (12646:3fa08822f79c) | misc.isa (12714:6870e0c151b1) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016-2018 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 206 unchanged lines hidden (view full) --- 215 return new McrMrcMiscInst(isRead ? "mrc nop" : "mcr nop", 216 machInst, iss, MISCREG_NOP); 217 case MISCREG_CP15_UNIMPL: 218 return new FailUnimplemented(isRead ? "mrc unkown" : "mcr unkown", 219 machInst, 220 csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", 221 crn, opc1, crm, opc2, isRead ? "read" : "write")); 222 case MISCREG_IMPDEF_UNIMPL: | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016-2018 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 206 unchanged lines hidden (view full) --- 215 return new McrMrcMiscInst(isRead ? "mrc nop" : "mcr nop", 216 machInst, iss, MISCREG_NOP); 217 case MISCREG_CP15_UNIMPL: 218 return new FailUnimplemented(isRead ? "mrc unkown" : "mcr unkown", 219 machInst, 220 csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", 221 crn, opc1, crm, opc2, isRead ? "read" : "write")); 222 case MISCREG_IMPDEF_UNIMPL: |
223 return new McrMrcImplDefined( 224 isRead ? "mrc implementation defined" : 225 "mcr implementation defined", 226 machInst, iss, MISCREG_IMPDEF_UNIMPL); | 223 224 if (miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL]) { 225 auto mnemonic = 226 csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s", 227 crn, opc1, crm, opc2, isRead ? "read" : "write"); 228 229 return new WarnUnimplemented( 230 isRead ? "mrc implementation defined" : 231 "mcr implementation defined", 232 machInst, mnemonic + " treated as NOP"); 233 } else { 234 return new McrMrcImplDefined( 235 isRead ? "mrc implementation defined" : 236 "mcr implementation defined", 237 machInst, iss, MISCREG_IMPDEF_UNIMPL); 238 } |
227 case MISCREG_CP15ISB: 228 return new Isb(machInst, iss); 229 case MISCREG_CP15DSB: 230 return new Dsb(machInst, iss); 231 case MISCREG_CP15DMB: 232 return new Dmb(machInst, iss); 233 case MISCREG_DCIMVAC: 234 return new McrDcimvac(machInst, miscReg, rt, iss); --- 111 unchanged lines hidden --- | 239 case MISCREG_CP15ISB: 240 return new Isb(machInst, iss); 241 case MISCREG_CP15DSB: 242 return new Dsb(machInst, iss); 243 case MISCREG_CP15DMB: 244 return new Dmb(machInst, iss); 245 case MISCREG_DCIMVAC: 246 return new McrDcimvac(machInst, miscReg, rt, iss); --- 111 unchanged lines hidden --- |