| misc.isa (12530:ab63172c4fbe) | misc.isa (12646:3fa08822f79c) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016-2018 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 163 unchanged lines hidden (view full) --- 172 case MISCREG_CP14_UNIMPL: 173 return new FailUnimplemented(isRead ? "mrc unknown" : "mcr unknown", 174 machInst, 175 csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", 176 crn, opc1, crm, opc2, isRead ? "read" : "write")); 177 default: 178 uint32_t iss = mcrMrcIssBuild(isRead, crm, rt, crn, opc1, opc2); 179 if (isRead) { | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010-2013,2016-2018 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 163 unchanged lines hidden (view full) --- 172 case MISCREG_CP14_UNIMPL: 173 return new FailUnimplemented(isRead ? "mrc unknown" : "mcr unknown", 174 machInst, 175 csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", 176 crn, opc1, crm, opc2, isRead ? "read" : "write")); 177 default: 178 uint32_t iss = mcrMrcIssBuild(isRead, crm, rt, crn, opc1, opc2); 179 if (isRead) { |
| 180 return new Mrc14(machInst, rt, (IntRegIndex)miscReg, iss); | 180 return new Mrc14(machInst, rt, miscReg, iss); |
| 181 } else { | 181 } else { |
| 182 return new Mcr14(machInst, (IntRegIndex)miscReg, rt, iss); | 182 return new Mcr14(machInst, miscReg, rt, iss); |
| 183 } 184 } 185 } 186 ''' 187}}; 188 189def format McrMrc14() {{ 190 decode_block = ''' --- 155 unchanged lines hidden --- | 183 } 184 } 185 } 186 ''' 187}}; 188 189def format McrMrc14() {{ 190 decode_block = ''' --- 155 unchanged lines hidden --- |