misc.isa (10420:cc13df09fa55) misc.isa (10506:aa23216161fa)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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268 // the correct behaviour for hyp traps and undef exceptions.
269 miscRegInfo[miscReg][MISCREG_IMPLEMENTED] = true;
270 miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL] = false;
271 }
272
273 if (miscRegInfo[miscReg][MISCREG_IMPLEMENTED]) {
274 uint32_t iss = mcrrMrrcIssBuild(isRead, crm, rt, rt2, opc1);
275
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 259 unchanged lines hidden (view full) ---

268 // the correct behaviour for hyp traps and undef exceptions.
269 miscRegInfo[miscReg][MISCREG_IMPLEMENTED] = true;
270 miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL] = false;
271 }
272
273 if (miscRegInfo[miscReg][MISCREG_IMPLEMENTED]) {
274 uint32_t iss = mcrrMrrcIssBuild(isRead, crm, rt, rt2, opc1);
275
276 if (isRead)
277 return new Mrrc15(machInst, miscReg, rt2, rt, iss);
276 if (isRead) {
277 StaticInstPtr si = new Mrrc15(machInst, miscReg, rt2, rt, iss);
278 if (miscRegInfo[miscReg][MISCREG_UNVERIFIABLE])
279 si->setFlag(StaticInst::IsUnverifiable);
280 return si;
281 }
278 return new Mcrr15(machInst, rt2, rt, miscReg, iss);
279 } else {
280 return new FailUnimplemented(isRead ? "mrrc" : "mcrr", machInst,
281 csprintf("%s %s",
282 isRead ? "mrrc" : "mcrr", miscRegName[miscReg]));
283 }
284 }
285 }

--- 14 unchanged lines hidden --- 		282 return new Mcrr15(machInst, rt2, rt, miscReg, iss);
283 } else {
284 return new FailUnimplemented(isRead ? "mrrc" : "mcrr", machInst,
285 csprintf("%s %s",
286 isRead ? "mrrc" : "mcrr", miscRegName[miscReg]));
287 }
288 }
289 }

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