misc.isa (10418:7a76e13f0101) misc.isa (10420:cc13df09fa55)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 260 unchanged lines hidden (view full) ---

269 miscRegInfo[miscReg][MISCREG_IMPLEMENTED] = true;
270 miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL] = false;
271 }
272
273 if (miscRegInfo[miscReg][MISCREG_IMPLEMENTED]) {
274 uint32_t iss = mcrrMrrcIssBuild(isRead, crm, rt, rt2, opc1);
275
276 if (isRead)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 260 unchanged lines hidden (view full) ---

269 miscRegInfo[miscReg][MISCREG_IMPLEMENTED] = true;
270 miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL] = false;
271 }
272
273 if (miscRegInfo[miscReg][MISCREG_IMPLEMENTED]) {
274 uint32_t iss = mcrrMrrcIssBuild(isRead, crm, rt, rt2, opc1);
275
276 if (isRead)
277 return new Mrrc15(machInst, (IntRegIndex) miscReg, rt2, rt, iss);
278 return new Mcrr15(machInst, rt2, rt, (IntRegIndex) miscReg, iss);
277 return new Mrrc15(machInst, miscReg, rt2, rt, iss);
278 return new Mcrr15(machInst, rt2, rt, miscReg, iss);
279 } else {
280 return new FailUnimplemented(isRead ? "mrrc" : "mcrr", machInst,
281 csprintf("%s %s",
282 isRead ? "mrrc" : "mcrr", miscRegName[miscReg]));
283 }
284 }
285 }
286 '''

--- 13 unchanged lines hidden --- 		279 } else {
280 return new FailUnimplemented(isRead ? "mrrc" : "mcrr", machInst,
281 csprintf("%s %s",
282 isRead ? "mrrc" : "mcrr", miscRegName[miscReg]));
283 }
284 }
285 }
286 '''

--- 13 unchanged lines hidden ---