mem.isa (7499:be7c22eb8c20) mem.isa (10037:5cac77888310)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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277 return new %(rfe_u)s(machInst, rn, RfeOp::IncrementAfter, wb);
278 } else if (!add && wb) {
279 return new %(rfe_w)s(machInst, rn, RfeOp::DecrementBefore, wb);
280 } else {
281 return new %(rfe_uw)s(machInst, rn, RfeOp::IncrementAfter, wb);
282 }
283 } else {
284 const uint32_t mode = bits(machInst, 4, 0);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 268 unchanged lines hidden (view full) ---

277 return new %(rfe_u)s(machInst, rn, RfeOp::IncrementAfter, wb);
278 } else if (!add && wb) {
279 return new %(rfe_w)s(machInst, rn, RfeOp::DecrementBefore, wb);
280 } else {
281 return new %(rfe_uw)s(machInst, rn, RfeOp::IncrementAfter, wb);
282 }
283 } else {
284 const uint32_t mode = bits(machInst, 4, 0);
285 if (badMode((OperatingMode)mode))
285 if (badMode32((OperatingMode)mode))
286 return new Unknown(machInst);
287 if (!add && !wb) {
288 return new %(srs)s(machInst, mode,
289 SrsOp::DecrementBefore, wb);
290 } else if (add && !wb) {
291 return new %(srs_u)s(machInst, mode,
292 SrsOp::IncrementAfter, wb);
293 } else if (!add && wb) {

--- 765 unchanged lines hidden --- 		286 return new Unknown(machInst);
287 if (!add && !wb) {
288 return new %(srs)s(machInst, mode,
289 SrsOp::DecrementBefore, wb);
290 } else if (add && !wb) {
291 return new %(srs_u)s(machInst, mode,
292 SrsOp::IncrementAfter, wb);
293 } else if (!add && wb) {

--- 765 unchanged lines hidden ---