mem.isa (7305:6ed0e7460ed5) mem.isa (7309:35b6ca04e5b9)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 311 unchanged lines hidden (view full) ---

320 return new %(strexd)s(machInst, rd, rt,
321 rt2, rn, true, 0);
322 default:
323 return new Unknown(machInst);
324 }
325 } else {
326 switch (op3) {
327 case 0x0:
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 311 unchanged lines hidden (view full) ---

320 return new %(strexd)s(machInst, rd, rt,
321 rt2, rn, true, 0);
322 default:
323 return new Unknown(machInst);
324 }
325 } else {
326 switch (op3) {
327 case 0x0:
328 return new WarnUnimplemented("tbb", machInst);
328 return new Tbb(machInst, rn, rd);
329 case 0x1:
329 case 0x1:
330 return new WarnUnimplemented("tbh", machInst);
330 return new Tbh(machInst, rn, rd);
331 case 0x4:
332 return new %(ldrexb)s(machInst, rt, rn, true, 0);
333 case 0x5:
334 return new %(ldrexh)s(machInst, rt, rn, true, 0);
335 case 0x7:
336 return new %(ldrexd)s(machInst, rt, rt2, rn, true, 0);
337 default:
338 return new Unknown(machInst);

--- 699 unchanged lines hidden --- 		331 case 0x4:
332 return new %(ldrexb)s(machInst, rt, rn, true, 0);
333 case 0x5:
334 return new %(ldrexh)s(machInst, rt, rn, true, 0);
335 case 0x7:
336 return new %(ldrexd)s(machInst, rt, rt2, rn, true, 0);
337 default:
338 return new Unknown(machInst);

--- 699 unchanged lines hidden ---