mem.isa (7304:ce1844ce6412) mem.isa (7305:6ed0e7460ed5)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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230 return new Swpb(machInst, rt, rt2, rn);
231 case 0x18:
232 return new %(strex)s(machInst, rt, rt2, rn, true, 0);
233 case 0x19:
234 return new %(ldrex)s(machInst, rt, rn, true, 0);
235 case 0x1a:
236 return new %(strexd)s(machInst, rt, rt2, rt2 + 1, rn, true, 0);
237 case 0x1b:
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 221 unchanged lines hidden (view full) ---

230 return new Swpb(machInst, rt, rt2, rn);
231 case 0x18:
232 return new %(strex)s(machInst, rt, rt2, rn, true, 0);
233 case 0x19:
234 return new %(ldrex)s(machInst, rt, rn, true, 0);
235 case 0x1a:
236 return new %(strexd)s(machInst, rt, rt2, rt2 + 1, rn, true, 0);
237 case 0x1b:
238 return new WarnUnimplemented("ldrexd", machInst);
238 return new %(ldrexd)s(machInst, rt, rt + 1, rn, true, 0);
239 case 0x1c:
240 return new %(strexb)s(machInst, rt, rt2, rn, true, 0);
241 case 0x1d:
242 return new %(ldrexb)s(machInst, rt, rn, true, 0);
243 case 0x1e:
244 return new %(strexh)s(machInst, rt, rt2, rn, true, 0);
245 case 0x1f:
246 return new %(ldrexh)s(machInst, rt, rn, true, 0);
247 default:
248 return new Unknown(machInst);
249 }
250 }
251 ''' % {
252 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
253 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
254 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2),
239 case 0x1c:
240 return new %(strexb)s(machInst, rt, rt2, rn, true, 0);
241 case 0x1d:
242 return new %(ldrexb)s(machInst, rt, rn, true, 0);
243 case 0x1e:
244 return new %(strexh)s(machInst, rt, rt2, rn, true, 0);
245 case 0x1f:
246 return new %(ldrexh)s(machInst, rt, rn, true, 0);
247 default:
248 return new Unknown(machInst);
249 }
250 }
251 ''' % {
252 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
253 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
254 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2),
255 "ldrexd" : "LDREXD_" + loadDoubleImmClassName(False, True, False),
255 "strex" : "STREX_" + storeImmClassName(False, True, False, size=4),
256 "strexb" : "STREXB_" + storeImmClassName(False, True, False, size=1),
257 "strexh" : "STREXH_" + storeImmClassName(False, True, False, size=2),
258 "strexd" : "STREXD_" + storeDoubleImmClassName(False, True, False)
259 }
260}};
261
262def format Thumb32SrsRfe() {{

--- 774 unchanged lines hidden --- 		256 "strex" : "STREX_" + storeImmClassName(False, True, False, size=4),
257 "strexb" : "STREXB_" + storeImmClassName(False, True, False, size=1),
258 "strexh" : "STREXH_" + storeImmClassName(False, True, False, size=2),
259 "strexd" : "STREXD_" + storeDoubleImmClassName(False, True, False)
260 }
261}};
262
263def format Thumb32SrsRfe() {{

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