mem.isa (7123:d73415da8c9d) mem.isa (7124:50d26210c812)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 344 unchanged lines hidden (view full) ---

353 "str_imm" : storeImmClassName(False, True, False),
354 "str_puw" : buildPuwDecode(4),
355 "strt" : storeImmClassName(False, True, False, user=True),
356 "str_reg" : storeRegClassName(False, True, False)
357 }
358 decode_block = decode % classNames
359}};
360
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 344 unchanged lines hidden (view full) ---

353 "str_imm" : storeImmClassName(False, True, False),
354 "str_puw" : buildPuwDecode(4),
355 "strt" : storeImmClassName(False, True, False, user=True),
356 "str_reg" : storeRegClassName(False, True, False)
357 }
358 decode_block = decode % classNames
359}};
360
361def format Thumb16MemReg() {{
362 decode = '''
363 {
364 const uint32_t opb = bits(machInst, 11, 9);
365 const uint32_t rt = bits(machInst, 2, 0);
366 const uint32_t rn = bits(machInst, 5, 3);
367 const uint32_t rm = bits(machInst, 8, 6);
368 switch (opb) {
369 case 0x0:
370 return new %(str)s(machInst, rt, rn, true, 0, LSL, rm);
371 case 0x1:
372 return new %(strh)s(machInst, rt, rn, true, 0, LSL, rm);
373 case 0x2:
374 return new %(strb)s(machInst, rt, rn, true, 0, LSL, rm);
375 case 0x3:
376 return new %(ldrsb)s(machInst, rt, rn, true, 0, LSL, rm);
377 case 0x4:
378 return new %(ldr)s(machInst, rt, rn, true, 0, LSL, rm);
379 case 0x5:
380 return new %(ldrh)s(machInst, rt, rn, true, 0, LSL, rm);
381 case 0x6:
382 return new %(ldrb)s(machInst, rt, rn, true, 0, LSL, rm);
383 case 0x7:
384 return new %(ldrsh)s(machInst, rt, rn, true, 0, LSL, rm);
385 }
386 }
387 '''
388 classNames = {
389 "str" : storeRegClassName(False, True, False),
390 "strh" : storeRegClassName(False, True, False, size=2),
391 "strb" : storeRegClassName(False, True, False, size=1),
392 "ldrsb" : loadRegClassName(False, True, False, sign=True, size=1),
393 "ldr" : loadRegClassName(False, True, False),
394 "ldrh" : loadRegClassName(False, True, False, size=2),
395 "ldrb" : loadRegClassName(False, True, False, size=1),
396 "ldrsh" : loadRegClassName(False, True, False, sign=True, size=2),
397 }
398 decode_block = decode % classNames
399}};
400
361def format ArmLoadMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
362 mem_flags = [], inst_flags = []) {{
363 ea_code = ArmGenericCodeSubs(ea_code)
364 memacc_code = ArmGenericCodeSubs(memacc_code)
365 (header_output, decoder_output, decode_block, exec_output) = \
366 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
367 decode_template = BasicDecode,
368 exec_template_base = 'Load')
369}};
370
371def format ArmStoreMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
372 mem_flags = [], inst_flags = []) {{
373 ea_code = ArmGenericCodeSubs(ea_code)
374 memacc_code = ArmGenericCodeSubs(memacc_code)
375 (header_output, decoder_output, decode_block, exec_output) = \
376 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
377 exec_template_base = 'Store')
378}};
379
401def format ArmLoadMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
402 mem_flags = [], inst_flags = []) {{
403 ea_code = ArmGenericCodeSubs(ea_code)
404 memacc_code = ArmGenericCodeSubs(memacc_code)
405 (header_output, decoder_output, decode_block, exec_output) = \
406 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
407 decode_template = BasicDecode,
408 exec_template_base = 'Load')
409}};
410
411def format ArmStoreMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
412 mem_flags = [], inst_flags = []) {{
413 ea_code = ArmGenericCodeSubs(ea_code)
414 memacc_code = ArmGenericCodeSubs(memacc_code)
415 (header_output, decoder_output, decode_block, exec_output) = \
416 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
417 exec_template_base = 'Store')
418}};
419