mem.isa (6302:cc0c9db8ca55) mem.isa (6303:cb190056165e)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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454 return NoFault;
455 }
456}};
457
458let {{
459 def buildPUBWLCase(p, u, b, w, l):
460 return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0)
461
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 445 unchanged lines hidden (view full) ---

454 return NoFault;
455 }
456}};
457
458let {{
459 def buildPUBWLCase(p, u, b, w, l):
460 return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0)
461
462 def buildMode2Inst(p, u, b, w, l, suffix, offset):
463 mnem = ("str", "ldr")[l]
464 op = ("-", "+")[u]
465 offset = op + ArmGenericCodeSubs(offset);
466 mem = ("Mem", "Mem.ub")[b]
467 code = ("%s = Rd;", "Rd = %s;")[l] % mem
468 ea_code = "EA = Rn %s;" % ("", offset)[p]
469 if p == 0 or w == 1:
470 code += "Rn = Rn %s;" % offset
471 if p == 0 and w == 0:
472 # Here's where we'll tack on a flag to make this a usermode access.
473 mnem += "t"
474 type = ("Store", "Load")[l]
475 suffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
476 if b == 1:
477 mnem += "b"
478 return LoadStoreBase(mnem, mnem.capitalize() + suffix,
479 ea_code, code, mem_flags = [], inst_flags = [],
480 exec_template_base = type.capitalize())
481
462 def buildMode3Inst(p, u, i, w, type, code, mnem):
463 op = ("-", "+")[u]
464 offset = ("%s Rm", "%s hilo")[i] % op
465 ea_code = "EA = Rn %s;" % ("", offset)[p]
466 if p == 0 or w == 1:
467 code += "Rn = Rn %s;" % offset
468 suffix = "_P%dU%dI%dW%d" % (p, u, i, w)
469 return LoadStoreBase(mnem, mnem.capitalize() + suffix,
470 ea_code, code, mem_flags = [], inst_flags = [],
471 exec_template_base = type.capitalize())
472}};
473
482 def buildMode3Inst(p, u, i, w, type, code, mnem):
483 op = ("-", "+")[u]
484 offset = ("%s Rm", "%s hilo")[i] % op
485 ea_code = "EA = Rn %s;" % ("", offset)[p]
486 if p == 0 or w == 1:
487 code += "Rn = Rn %s;" % offset
488 suffix = "_P%dU%dI%dW%d" % (p, u, i, w)
489 return LoadStoreBase(mnem, mnem.capitalize() + suffix,
490 ea_code, code, mem_flags = [], inst_flags = [],
491 exec_template_base = type.capitalize())
492}};
493
494def format AddrMode2(suffix, offset) {{
495 header_output = decoder_output = exec_output = ""
496 decode_block = "switch(PUBWL) {\n"
497
498 # Loop over all the values of p, u, b, w and l and build instructions and
499 # a decode block for them.
500 for p in (0, 1):
501 for u in (0, 1):
502 for b in (0, 1):
503 for w in (0, 1):
504 for l in (0, 1):
505 (new_header_output,
506 new_decoder_output,
507 new_decode_block,
508 new_exec_output) = buildMode2Inst(p, u, b, w, l,
509 suffix, offset)
510 header_output += new_header_output
511 decoder_output += new_decoder_output
512 exec_output += new_exec_output
513 decode_block += '''
514 case %#x:
515 {%s}
516 break;
517 ''' % (buildPUBWLCase(p,u,b,w,l), new_decode_block)
518 decode_block += '''
519 default:
520 return new Unknown(machInst);
521 break;
522 }'''
523}};
524
474def format AddrMode3(l0Type, l0Code, l1Type, l1Code) {{
475 l0Code = ArmGenericCodeSubs(l0Code);
476 l1Code = ArmGenericCodeSubs(l1Code);
477
478 header_output = decoder_output = exec_output = ""
479 decode_block = "switch(PUBWL) {\n"
480 (l0Mnem, l1Mnem) = name.split("_");
481

--- 51 unchanged lines hidden --- 		525def format AddrMode3(l0Type, l0Code, l1Type, l1Code) {{
526 l0Code = ArmGenericCodeSubs(l0Code);
527 l1Code = ArmGenericCodeSubs(l1Code);
528
529 header_output = decoder_output = exec_output = ""
530 decode_block = "switch(PUBWL) {\n"
531 (l0Mnem, l1Mnem) = name.split("_");
532

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