mem.isa (10037:5cac77888310) | mem.isa (12595:b5a51007feac) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 456 unchanged lines hidden (view full) --- 465 case 5: 466 return new %(imm_pw)s(machInst, RT, RN, false, imm); 467 case 6: 468 return new %(imm_pu)s(machInst, RT, RN, true, imm); 469 case 7: 470 return new %(imm_puw)s(machInst, RT, RN, true, imm); 471 } 472 } | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 456 unchanged lines hidden (view full) --- 465 case 5: 466 return new %(imm_pw)s(machInst, RT, RN, false, imm); 467 case 6: 468 return new %(imm_pu)s(machInst, RT, RN, true, imm); 469 case 7: 470 return new %(imm_puw)s(machInst, RT, RN, true, imm); 471 } 472 } |
473 return new Unknown(machInst); |
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473 } else { 474 return new Unknown(machInst); 475 } 476 } 477 ''' 478 classNames = { 479 "literal_u" : loadImmClassName(False, True, False), 480 "literal" : loadImmClassName(False, False, False), --- 28 unchanged lines hidden (view full) --- 509 case 4: 510 return new %(imm_p)s(machInst, RT, RN, false, imm); 511 case 5: 512 return new %(imm_pw)s(machInst, RT, RN, false, imm); 513 case 6: 514 return new %(imm_pu)s(machInst, RT, RN, true, imm); 515 case 7: 516 return new %(imm_puw)s(machInst, RT, RN, true, imm); | 474 } else { 475 return new Unknown(machInst); 476 } 477 } 478 ''' 479 classNames = { 480 "literal_u" : loadImmClassName(False, True, False), 481 "literal" : loadImmClassName(False, False, False), --- 28 unchanged lines hidden (view full) --- 510 case 4: 511 return new %(imm_p)s(machInst, RT, RN, false, imm); 512 case 5: 513 return new %(imm_pw)s(machInst, RT, RN, false, imm); 514 case 6: 515 return new %(imm_pu)s(machInst, RT, RN, true, imm); 516 case 7: 517 return new %(imm_puw)s(machInst, RT, RN, true, imm); |
518 default: 519 M5_UNREACHABLE; |
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517 } 518 } 519 ''' 520 return puwDecode % { 521 "imm_w" : storeImmClassName(True, False, True, size=size), 522 "imm_uw" : storeImmClassName(True, True, True, size=size), 523 "imm_p" : storeImmClassName(False, False, False, size=size), 524 "imm_pw" : storeImmClassName(False, False, True, size=size), --- 448 unchanged lines hidden (view full) --- 973 case 0x4: 974 return new %(ldr)s(machInst, rt, rn, true, 0, LSL, rm); 975 case 0x5: 976 return new %(ldrh)s(machInst, rt, rn, true, 0, LSL, rm); 977 case 0x6: 978 return new %(ldrb)s(machInst, rt, rn, true, 0, LSL, rm); 979 case 0x7: 980 return new %(ldrsh)s(machInst, rt, rn, true, 0, LSL, rm); | 520 } 521 } 522 ''' 523 return puwDecode % { 524 "imm_w" : storeImmClassName(True, False, True, size=size), 525 "imm_uw" : storeImmClassName(True, True, True, size=size), 526 "imm_p" : storeImmClassName(False, False, False, size=size), 527 "imm_pw" : storeImmClassName(False, False, True, size=size), --- 448 unchanged lines hidden (view full) --- 976 case 0x4: 977 return new %(ldr)s(machInst, rt, rn, true, 0, LSL, rm); 978 case 0x5: 979 return new %(ldrh)s(machInst, rt, rn, true, 0, LSL, rm); 980 case 0x6: 981 return new %(ldrb)s(machInst, rt, rn, true, 0, LSL, rm); 982 case 0x7: 983 return new %(ldrsh)s(machInst, rt, rn, true, 0, LSL, rm); |
984 default: 985 M5_UNREACHABLE; |
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981 } 982 } 983 ''' 984 classNames = { 985 "str" : storeRegClassName(False, True, False), 986 "strh" : storeRegClassName(False, True, False, size=2), 987 "strb" : storeRegClassName(False, True, False, size=1), 988 "ldrsb" : loadRegClassName(False, True, False, sign=True, size=1), --- 70 unchanged lines hidden --- | 986 } 987 } 988 ''' 989 classNames = { 990 "str" : storeRegClassName(False, True, False), 991 "strh" : storeRegClassName(False, True, False, size=2), 992 "strb" : storeRegClassName(False, True, False, size=1), 993 "ldrsb" : loadRegClassName(False, True, False, sign=True, size=1), --- 70 unchanged lines hidden --- |