1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 189 unchanged lines hidden (view full) --- 198 199 decode_block += ''' 200 default: 201 return new Unknown(machInst); 202 break; 203 }''' 204}}; 205 |
206def format Thumb32LoadWord() {{ 207 decode = ''' 208 { 209 uint32_t op1 = bits(machInst, 24, 23); 210 if (bits(op1, 1) == 0) { 211 uint32_t op2 = bits(machInst, 11, 6); 212 if (HTRN == 0xF) { 213 if (UP) { 214 return new %(literal_u)s(machInst, RT, INTREG_PC, 215 true, IMMED_11_0); 216 } else { 217 return new %(literal)s(machInst, RT, INTREG_PC, 218 false, IMMED_11_0); 219 } 220 } else if (op1 == 0x1) { 221 return new %(imm_pu)s(machInst, RT, RN, true, IMMED_11_0); 222 } else if (op2 == 0) { 223 return new %(register)s(machInst, RT, RN, UP, 224 bits(machInst, 5, 4), LSL, RM); 225 } else if ((op2 & 0x3c) == 0x38) { 226 return new %(ldrt)s(machInst, RT, RN, true, IMMED_7_0); 227 } else if ((op2 & 0x3c) == 0x30 || //P 228 (op2 & 0x24) == 0x24) { //W 229 uint32_t puw = bits(machInst, 10, 8); 230 uint32_t imm = IMMED_7_0; 231 switch (puw) { 232 case 0: 233 case 2: 234 // If we're here, either P or W must have been set. 235 panic("Neither P or W set, but that " 236 "shouldn't be possible.\\n"); 237 case 1: 238 return new %(imm_w)s(machInst, RT, RN, false, imm); 239 case 3: 240 return new %(imm_uw)s(machInst, RT, RN, true, imm); 241 case 4: 242 return new %(imm_p)s(machInst, RT, RN, false, imm); 243 case 5: 244 return new %(imm_pw)s(machInst, RT, RN, false, imm); 245 case 6: 246 return new %(imm_pu)s(machInst, RT, RN, true, imm); 247 case 7: 248 return new %(imm_puw)s(machInst, RT, RN, true, imm); 249 } 250 } 251 } else { 252 return new Unknown(machInst); 253 } 254 } 255 ''' 256 classNames = { 257 "literal_u" : loadImmClassName(False, True, False), 258 "literal" : loadImmClassName(False, False, False), 259 "register" : loadRegClassName(False, True, False), 260 "ldrt" : loadImmClassName(False, True, False, user=True), 261 "imm_w" : loadImmClassName(True, False, True), 262 "imm_uw" : loadImmClassName(True, True, True), 263 "imm_p" : loadImmClassName(False, False, False), 264 "imm_pw" : loadImmClassName(False, False, True), 265 "imm_pu" : loadImmClassName(False, True, False), 266 "imm_puw" : loadImmClassName(False, True, True) 267 } 268 decode_block = decode % classNames 269}}; 270 |
271def format ArmLoadMemory(memacc_code, ea_code = {{ EA = Rn + disp; }}, 272 mem_flags = [], inst_flags = []) {{ 273 ea_code = ArmGenericCodeSubs(ea_code) 274 memacc_code = ArmGenericCodeSubs(memacc_code) 275 (header_output, decoder_output, decode_block, exec_output) = \ 276 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 277 decode_template = BasicDecode, 278 exec_template_base = 'Load') 279}}; 280 281def format ArmStoreMemory(memacc_code, ea_code = {{ EA = Rn + disp; }}, 282 mem_flags = [], inst_flags = []) {{ 283 ea_code = ArmGenericCodeSubs(ea_code) 284 memacc_code = ArmGenericCodeSubs(memacc_code) 285 (header_output, decoder_output, decode_block, exec_output) = \ 286 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 287 exec_template_base = 'Store') 288}}; 289 |