1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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224 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
225 const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
226 switch (PUBWL) {
227 case 0x10:
228 return new Swp(machInst, rt, rt2, rn);
229 case 0x14:
230 return new Swpb(machInst, rt, rt2, rn);
231 case 0x18:
232 return new WarnUnimplemented("strex", machInst);
233 case 0x19:
234 return new %(ldrex)s(machInst, rt, rn, true, 0);
235 case 0x1a:
236 return new WarnUnimplemented("strexd", machInst);
237 case 0x1b:
238 return new WarnUnimplemented("ldrexd", machInst);
239 case 0x1c:
240 return new WarnUnimplemented("strexb", machInst);
241 case 0x1d:
242 return new %(ldrexb)s(machInst, rt, rn, true, 0);
243 case 0x1e:
244 return new WarnUnimplemented("strexh", machInst);
245 case 0x1f:
246 return new %(ldrexh)s(machInst, rt, rn, true, 0);
247 default:
248 return new Unknown(machInst);
249 }
250 }
251 ''' % {
252 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
253 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
254 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2)
255 }
256}};
257
258def format Thumb32SrsRfe() {{
259 decode_block = '''
260 {
261 if (bits(machInst, 20) == 1) {
262 const bool add = (bits(machInst, 24, 23) == 0x3);

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289 decode_block = '''
290 {
291 const uint32_t op1 = bits(machInst, 24, 23);
292 const uint32_t op2 = bits(machInst, 21, 20);
293 const uint32_t op3 = bits(machInst, 7, 4);
294 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
295 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
296 const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
297 const uint32_t imm8 = bits(machInst, 7, 0);
298 if (bits(op1, 1) == 0 && bits(op2, 1) == 0) {
299 if (op1 == 0) {
300 const uint32_t imm = bits(machInst, 7, 0) << 2;
301 if (op2 == 0) {
302 return new WarnUnimplemented("strex", machInst);
303 } else {
304 return new %(ldrex)s(machInst, rt, rn, true, imm);
305 }
306 } else {
307 if (op2 == 0) {
308 switch (op3) {
309 case 0x4:
310 return new WarnUnimplemented("strexb", machInst);
311 case 0x5:
312 return new WarnUnimplemented("strexh", machInst);
313 case 0x7:
314 return new WarnUnimplemented("strexd", machInst);
315 default:
316 return new Unknown(machInst);
317 }
318 } else {
319 switch (op3) {
320 case 0x0:
321 return new WarnUnimplemented("tbb", machInst);
322 case 0x1:

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373 }
374 }
375 }
376 ''' % {
377 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
378 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
379 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2),
380 "ldrexd" : "LDREXD_" + loadDoubleImmClassName(False, True, False),
381 "ldrd_w" : loadDoubleImmClassName(True, False, True),
382 "ldrd_uw" : loadDoubleImmClassName(True, True, True),
383 "ldrd_p" : loadDoubleImmClassName(False, False, False),
384 "ldrd_pw" : loadDoubleImmClassName(False, False, True),
385 "ldrd_pu" : loadDoubleImmClassName(False, True, False),
386 "ldrd_puw" : loadDoubleImmClassName(False, True, True),
387 "strd_w" : storeDoubleImmClassName(True, False, True),
388 "strd_uw" : storeDoubleImmClassName(True, True, True),

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