macromem.isa (6758:06d26015e4f1) macromem.isa (7130:12d7f945261f)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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142 decoder_output = MicroConstructor.subst(microAddiUopIop) + \
143 MicroConstructor.subst(microSubiUopIop)
144 exec_output = PredOpExecute.subst(microAddiUopIop) + \
145 PredOpExecute.subst(microSubiUopIop)
146}};
147
148////////////////////////////////////////////////////////////////////
149//
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 133 unchanged lines hidden (view full) ---

142 decoder_output = MicroConstructor.subst(microAddiUopIop) + \
143 MicroConstructor.subst(microSubiUopIop)
144 exec_output = PredOpExecute.subst(microAddiUopIop) + \
145 PredOpExecute.subst(microSubiUopIop)
146}};
147
148////////////////////////////////////////////////////////////////////
149//
150// Moving to/from double floating point registers
151//
152
153let {{
154 microMvtdUopIop = InstObjParams('mvtd_uop', 'MicroMvtdUop',
155 'PredOp',
156 {'code': 'Fd.ud = (Rhi.ud << 32) | Rlo;',
157 'predicate_test': predicateTest},
158 ['IsMicroop'])
159
160 microMvfdUopIop = InstObjParams('mvfd_uop', 'MicroMvfdUop',
161 'PredOp',
162 {'code': '''Rhi = bits(Fd.ud, 63, 32);
163 Rlo = bits(Fd.ud, 31, 0);''',
164 'predicate_test': predicateTest},
165 ['IsMicroop'])
166
167 header_output = BasicDeclare.subst(microMvtdUopIop) + \
168 BasicDeclare.subst(microMvfdUopIop)
169 decoder_output = BasicConstructor.subst(microMvtdUopIop) + \
170 BasicConstructor.subst(microMvfdUopIop)
171 exec_output = PredOpExecute.subst(microMvtdUopIop) + \
172 PredOpExecute.subst(microMvfdUopIop)
173}};
174
175////////////////////////////////////////////////////////////////////
176//
177// Macro Memory-format instructions
178//
179
180def template MacroStoreDeclare {{
181/**
182 * Static instructions class for a store multiple instruction
183 */
184class %(class_name)s : public %(base_class)s

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270 {
271 %(op_wb)s;
272 }
273
274 return fault;
275}
276}};
277
150// Macro Memory-format instructions
151//
152
153def template MacroStoreDeclare {{
154/**
155 * Static instructions class for a store multiple instruction
156 */
157class %(class_name)s : public %(base_class)s

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243 {
244 %(op_wb)s;
245 }
246
247 return fault;
248}
249}};
250
278def template MacroFPAConstructor {{
279inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
280 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
281{
282 %(constructor)s;
283
284 uint32_t start_addr = 0;
285
286 if (prepost)
287 start_addr = disp8;
288 else
289 start_addr = 0;
290
291 emit_ldfstf_uops(microOps, 0, machInst, loadop, up, start_addr);
292
293 if (writeback)
294 {
295 if (up) {
296 microOps[numMicroops - 1] =
297 new MicroAddiUop(machInst, RN, RN, disp8);
298 } else {
299 microOps[numMicroops - 1] =
300 new MicroSubiUop(machInst, RN, RN, disp8);
301 }
302 }
303 microOps[numMicroops - 1]->setLastMicroop();
304}
305
306}};
307
308
309def template MacroFMConstructor {{
310inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
311 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
312{
313 %(constructor)s;
314
315 uint32_t start_addr = 0;
316
317 if (prepost)
318 start_addr = disp8;
319 else
320 start_addr = 0;
321
322 for (int i = 0; i < count; i++)
323 emit_ldfstf_uops(microOps, 3*i, machInst, loadop, up, start_addr);
324
325 if (writeback) {
326 if (up) {
327 microOps[numMicroops - 1] =
328 new MicroAddiUop(machInst, RN, RN, disp8);
329 } else {
330 microOps[numMicroops - 1] =
331 new MicroSubiUop(machInst, RN, RN, disp8);
332 }
333 }
334 microOps[numMicroops - 1]->setLastMicroop();
335}
336}};
337
338
339def format ArmMacroStore(code, mem_flags = [], inst_flag = [], *opt_flags) {{
340 iop = InstObjParams(name, Name, 'ArmMacroMemoryOp', code, opt_flags)
341 header_output = MacroStoreDeclare.subst(iop)
342 decoder_output = MacroStoreConstructor.subst(iop)
343 decode_block = BasicDecode.subst(iop)
344 exec_output = MacroStoreExecute.subst(iop)
345}};
251def format ArmMacroStore(code, mem_flags = [], inst_flag = [], *opt_flags) {{
252 iop = InstObjParams(name, Name, 'ArmMacroMemoryOp', code, opt_flags)
253 header_output = MacroStoreDeclare.subst(iop)
254 decoder_output = MacroStoreConstructor.subst(iop)
255 decode_block = BasicDecode.subst(iop)
256 exec_output = MacroStoreExecute.subst(iop)
257}};
346
347def format ArmMacroFPAOp(code, mem_flags = [], inst_flag = [], *opt_flags) {{
348 iop = InstObjParams(name, Name, 'ArmMacroFPAOp',
349 {"code": code,
350 "predicate_test": predicateTest},
351 opt_flags)
352 header_output = BasicDeclare.subst(iop)
353 decoder_output = MacroFPAConstructor.subst(iop)
354 decode_block = BasicDecode.subst(iop)
355 exec_output = PredOpExecute.subst(iop)
356}};
357
358def format ArmMacroFMOp(code, mem_flags = [], inst_flag = [], *opt_flags) {{
359 iop = InstObjParams(name, Name, 'ArmMacroFMOp',
360 {"code": code,
361 "predicate_test": predicateTest},
362 opt_flags)
363 header_output = BasicDeclare.subst(iop)
364 decoder_output = MacroFMConstructor.subst(iop)
365 decode_block = BasicDecode.subst(iop)
366 exec_output = PredOpExecute.subst(iop)
367}};