macromem.isa (6243:3a1698fbbc9f) macromem.isa (6250:1cc6e860d95f)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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52 uint32_t ones;
53 uint32_t puswl,
54 prepost,
55 up,
56 psruser,
57 writeback,
58 loadop;
59
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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52 uint32_t ones;
53 uint32_t puswl,
54 prepost,
55 up,
56 psruser,
57 writeback,
58 loadop;
59
60 ArmMacroMemoryOp(const char *mnem, MachInst _machInst, OpClass __opClass,
60 ArmMacroMemoryOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
61 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
62 StaticInstPtr _memAccPtr = nullStaticInstPtr)
63 : PredMacroOp(mnem, _machInst, __opClass),
64 memAccessFlags(0), eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr),
65 reglist(REGLIST), ones(0), puswl(PUSWL), prepost(PREPOST), up(UP),
66 psruser(PSRUSER), writeback(WRITEBACK), loadop(LOADOP)
67 {
68 ones = number_of_ones(reglist);

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81 uint32_t puswl,
82 prepost,
83 up,
84 psruser,
85 writeback,
86 loadop;
87 int32_t disp8;
88
61 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
62 StaticInstPtr _memAccPtr = nullStaticInstPtr)
63 : PredMacroOp(mnem, _machInst, __opClass),
64 memAccessFlags(0), eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr),
65 reglist(REGLIST), ones(0), puswl(PUSWL), prepost(PREPOST), up(UP),
66 psruser(PSRUSER), writeback(WRITEBACK), loadop(LOADOP)
67 {
68 ones = number_of_ones(reglist);

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81 uint32_t puswl,
82 prepost,
83 up,
84 psruser,
85 writeback,
86 loadop;
87 int32_t disp8;
88
89 ArmMacroFPAOp(const char *mnem, MachInst _machInst, OpClass __opClass)
89 ArmMacroFPAOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
90 : PredMacroOp(mnem, _machInst, __opClass),
91 puswl(PUSWL), prepost(PREPOST), up(UP),
92 psruser(PSRUSER), writeback(WRITEBACK), loadop(LOADOP),
93 disp8(IMMED_7_0 << 2)
94 {
95 numMicroops = 3 + writeback;
96 microOps = new StaticInstPtr[numMicroops];
97 }

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108 up,
109 n1bit,
110 writeback,
111 loadop,
112 n0bit,
113 count;
114 int32_t disp8;
115
90 : PredMacroOp(mnem, _machInst, __opClass),
91 puswl(PUSWL), prepost(PREPOST), up(UP),
92 psruser(PSRUSER), writeback(WRITEBACK), loadop(LOADOP),
93 disp8(IMMED_7_0 << 2)
94 {
95 numMicroops = 3 + writeback;
96 microOps = new StaticInstPtr[numMicroops];
97 }

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108 up,
109 n1bit,
110 writeback,
111 loadop,
112 n0bit,
113 count;
114 int32_t disp8;
115
116 ArmMacroFMOp(const char *mnem, MachInst _machInst, OpClass __opClass)
116 ArmMacroFMOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
117 : PredMacroOp(mnem, _machInst, __opClass),
118 punwl(PUNWL), prepost(PREPOST), up(UP),
119 n1bit(OPCODE_22), writeback(WRITEBACK), loadop(LOADOP),
120 n0bit(OPCODE_15), disp8(IMMED_7_0 << 2)
121 {
122 // Transfer 1-4 registers based on n1 and n0 bits (with 00 repr. 4)
123 count = (n1bit << 1) | n0bit;
124 if (count == 0)

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138def template MacroStoreDeclare {{
139 /**
140 * Static instructions class for a store multiple instruction
141 */
142 class %(class_name)s : public %(base_class)s
143 {
144 public:
145 // Constructor
117 : PredMacroOp(mnem, _machInst, __opClass),
118 punwl(PUNWL), prepost(PREPOST), up(UP),
119 n1bit(OPCODE_22), writeback(WRITEBACK), loadop(LOADOP),
120 n0bit(OPCODE_15), disp8(IMMED_7_0 << 2)
121 {
122 // Transfer 1-4 registers based on n1 and n0 bits (with 00 repr. 4)
123 count = (n1bit << 1) | n0bit;
124 if (count == 0)

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138def template MacroStoreDeclare {{
139 /**
140 * Static instructions class for a store multiple instruction
141 */
142 class %(class_name)s : public %(base_class)s
143 {
144 public:
145 // Constructor
146 %(class_name)s(MachInst machInst);
146 %(class_name)s(ExtMachInst machInst);
147 %(BasicExecDeclare)s
148 };
149}};
150
151def template MacroStoreConstructor {{
147 %(BasicExecDeclare)s
148 };
149}};
150
151def template MacroStoreConstructor {{
152 inline %(class_name)s::%(class_name)s(MachInst machInst)
152 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
153 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
154 {
155 %(constructor)s;
156 uint32_t regs_to_handle = reglist;
157 uint32_t j = 0,
158 start_addr = 0,
159 end_addr = 0;
160

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270 %(op_wb)s;
271 }
272
273 return fault;
274 }
275}};
276
277def template MacroFPAConstructor {{
153 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
154 {
155 %(constructor)s;
156 uint32_t regs_to_handle = reglist;
157 uint32_t j = 0,
158 start_addr = 0,
159 end_addr = 0;
160

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270 %(op_wb)s;
271 }
272
273 return fault;
274 }
275}};
276
277def template MacroFPAConstructor {{
278 inline %(class_name)s::%(class_name)s(MachInst machInst)
278 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
279 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
280 {
281 %(constructor)s;
282
283 uint32_t start_addr = 0;
284
285 if (prepost)
286 start_addr = disp8;

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312 }
313 microOps[numMicroops-1]->setLastMicroop();
314 }
315
316}};
317
318
319def template MacroFMConstructor {{
279 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
280 {
281 %(constructor)s;
282
283 uint32_t start_addr = 0;
284
285 if (prepost)
286 start_addr = disp8;

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312 }
313 microOps[numMicroops-1]->setLastMicroop();
314 }
315
316}};
317
318
319def template MacroFMConstructor {{
320 inline %(class_name)s::%(class_name)s(MachInst machInst)
320 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
321 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
322 {
323 %(constructor)s;
324
325 uint32_t start_addr = 0;
326
327 if (prepost)
328 start_addr = disp8;

--- 67 unchanged lines hidden --- 		321 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
322 {
323 %(constructor)s;
324
325 uint32_t start_addr = 0;
326
327 if (prepost)
328 start_addr = disp8;

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