1// -*- mode:c++ -*- 2 3// Copyright (c) 2007-2008 The Florida State University 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 44 unchanged lines hidden (view full) --- 53 %(constructor)s; 54 uint32_t regs_to_handle = reglist; 55 uint32_t j = 0, 56 start_addr = 0, 57 end_addr = 0; 58 59 switch (puswl) 60 { |
61 case 0x00: // stmda |
62 case 0x01: // L ldmda_l |
63 case 0x02: // W stmda_w |
64 case 0x03: // WL ldmda_wl 65 start_addr = (ones << 2) - 4; 66 end_addr = 0; 67 break; 68 case 0x08: // U stmia_u |
69 case 0x09: // U L ldmia_ul |
70 case 0x0a: // U W stmia |
71 case 0x0b: // U WL ldmia 72 start_addr = 0; 73 end_addr = (ones << 2) - 4; 74 break; |
75 case 0x10: // P stmdb |
76 case 0x11: // P L ldmdb |
77 case 0x12: // P W stmdb |
78 case 0x13: // P WL ldmdb |
79 start_addr = (ones << 2); // U-bit is already 0 for subtract 80 end_addr = 4; // negative 4 81 break; 82 case 0x18: // PU stmib |
83 case 0x19: // PU L ldmib |
84 case 0x1a: // PU W stmib 85 case 0x1b: // PU WL ldmib |
86 start_addr = 4; 87 end_addr = (ones << 2) + 4; 88 break; 89 default: |
90 panic("Unhandled Load/Store Multiple Instruction, " 91 "puswl = 0x%x", (unsigned) puswl); |
92 break; 93 } 94 95 //TODO - Add addi_uop/subi_uop here to create starting addresses 96 //Just using addi with 0 offset makes a "copy" of Rn for our use 97 uint32_t newMachInst = 0; 98 newMachInst = machInst & 0xffff0000; 99 microOps[0] = new Addi_uop(newMachInst); --- 183 unchanged lines hidden --- |