m5ops.isa (8809:bb10807da889) | m5ops.isa (9687:22e9258c06bb) |
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1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48 case 0x03: return new QuiesceCycles(machInst); 49 case 0x04: return new QuiesceTime(machInst); 50 case 0x07: return new Rpns(machInst); 51 case 0x09: return new WakeCPU(machInst); 52 case 0x10: return new Deprecated_ivlb(machInst); 53 case 0x11: return new Deprecated_ivle(machInst); 54 case 0x20: return new Deprecated_exit (machInst); 55 case 0x21: return new M5exit(machInst); | 1// 2// Copyright (c) 2010 ARM Limited 3// All rights reserved 4// 5// The license below extends only to copyright in the software and shall 6// not be construed as granting a license to any other intellectual 7// property including but not limited to intellectual property relating 8// to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48 case 0x03: return new QuiesceCycles(machInst); 49 case 0x04: return new QuiesceTime(machInst); 50 case 0x07: return new Rpns(machInst); 51 case 0x09: return new WakeCPU(machInst); 52 case 0x10: return new Deprecated_ivlb(machInst); 53 case 0x11: return new Deprecated_ivle(machInst); 54 case 0x20: return new Deprecated_exit (machInst); 55 case 0x21: return new M5exit(machInst); |
56 case 0x22: return new M5fail(machInst); |
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56 case 0x31: return new Loadsymbol(machInst); 57 case 0x30: return new Initparam(machInst); 58 case 0x40: return new Resetstats(machInst); 59 case 0x41: return new Dumpstats(machInst); 60 case 0x42: return new Dumpresetstats(machInst); 61 case 0x43: return new M5checkpoint(machInst); 62 case 0x4F: return new M5writefile(machInst); 63 case 0x50: return new M5readfile(machInst); 64 case 0x51: return new M5break(machInst); 65 case 0x52: return new M5switchcpu(machInst); 66 case 0x53: return new M5addsymbol(machInst); 67 case 0x54: return new M5panic(machInst); 68 case 0x5a: return new M5workbegin(machInst); 69 case 0x5b: return new M5workend(machInst); 70 } 71 } 72 ''' 73}}; | 57 case 0x31: return new Loadsymbol(machInst); 58 case 0x30: return new Initparam(machInst); 59 case 0x40: return new Resetstats(machInst); 60 case 0x41: return new Dumpstats(machInst); 61 case 0x42: return new Dumpresetstats(machInst); 62 case 0x43: return new M5checkpoint(machInst); 63 case 0x4F: return new M5writefile(machInst); 64 case 0x50: return new M5readfile(machInst); 65 case 0x51: return new M5break(machInst); 66 case 0x52: return new M5switchcpu(machInst); 67 case 0x53: return new M5addsymbol(machInst); 68 case 0x54: return new M5panic(machInst); 69 case 0x5a: return new M5workbegin(machInst); 70 case 0x5b: return new M5workend(machInst); 71 } 72 } 73 ''' 74}}; |