fp.isa (8303:5a95f1d2494e) | fp.isa (8607:5fb918115c07) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 547 unchanged lines hidden (view full) --- 556 return decodeNeonUSThreeReg<NVmlsD, NVmlsQ>( 557 q, u, size, machInst, vd, vn, vm); 558 } else { 559 return decodeNeonUSThreeReg<NVmlaD, NVmlaQ>( 560 q, u, size, machInst, vd, vn, vm); 561 } 562 } 563 case 0xa: | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 547 unchanged lines hidden (view full) --- 556 return decodeNeonUSThreeReg<NVmlsD, NVmlsQ>( 557 q, u, size, machInst, vd, vn, vm); 558 } else { 559 return decodeNeonUSThreeReg<NVmlaD, NVmlaQ>( 560 q, u, size, machInst, vd, vn, vm); 561 } 562 } 563 case 0xa: |
564 if (q) 565 return new Unknown(machInst); |
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564 if (b) { | 566 if (b) { |
565 return decodeNeonUSThreeReg<VpminD, VpminQ>( 566 q, u, size, machInst, vd, vn, vm); | 567 return decodeNeonUSThreeUSReg<VpminD>( 568 u, size, machInst, vd, vn, vm); |
567 } else { | 569 } else { |
568 return decodeNeonUSThreeReg<VpmaxD, VpmaxQ>( 569 q, u, size, machInst, vd, vn, vm); | 570 return decodeNeonUSThreeUSReg<VpmaxD>( 571 u, size, machInst, vd, vn, vm); |
570 } 571 case 0xb: 572 if (b) { | 572 } 573 case 0xb: 574 if (b) { |
573 if (u) { | 575 if (u || q) { |
574 return new Unknown(machInst); 575 } else { | 576 return new Unknown(machInst); 577 } else { |
576 return decodeNeonUThreeReg<NVpaddD, NVpaddQ>( 577 q, size, machInst, vd, vn, vm); | 578 return decodeNeonUThreeUSReg<NVpaddD>( 579 size, machInst, vd, vn, vm); |
578 } 579 } else { 580 if (u) { 581 return decodeNeonSThreeSReg<VqrdmulhD, VqrdmulhQ>( 582 q, size, machInst, vd, vn, vm); 583 } else { 584 return decodeNeonSThreeSReg<VqdmulhD, VqdmulhQ>( 585 q, size, machInst, vd, vn, vm); --- 951 unchanged lines hidden (view full) --- 1537 case 0x2: 1538 switch (bits(b, 4, 1)) { 1539 case 0x0: 1540 if (q) 1541 return new NVswpQ<uint64_t>(machInst, vd, vm); 1542 else 1543 return new NVswpD<uint64_t>(machInst, vd, vm); 1544 case 0x1: | 580 } 581 } else { 582 if (u) { 583 return decodeNeonSThreeSReg<VqrdmulhD, VqrdmulhQ>( 584 q, size, machInst, vd, vn, vm); 585 } else { 586 return decodeNeonSThreeSReg<VqdmulhD, VqdmulhQ>( 587 q, size, machInst, vd, vn, vm); --- 951 unchanged lines hidden (view full) --- 1539 case 0x2: 1540 switch (bits(b, 4, 1)) { 1541 case 0x0: 1542 if (q) 1543 return new NVswpQ<uint64_t>(machInst, vd, vm); 1544 else 1545 return new NVswpD<uint64_t>(machInst, vd, vm); 1546 case 0x1: |
1545 return decodeNeonUTwoMiscReg | 1547 return decodeNeonUTwoMiscSReg<NVtrnD, NVtrnQ>( |
1546 q, size, machInst, vd, vm); 1547 case 0x2: 1548 return decodeNeonUTwoMiscReg<NVuzpD, NVuzpQ>( 1549 q, size, machInst, vd, vm); 1550 case 0x3: 1551 return decodeNeonUTwoMiscReg<NVzipD, NVzipQ>( 1552 q, size, machInst, vd, vm); 1553 case 0x4: --- 952 unchanged lines hidden --- | 1548 q, size, machInst, vd, vm); 1549 case 0x2: 1550 return decodeNeonUTwoMiscReg<NVuzpD, NVuzpQ>( 1551 q, size, machInst, vd, vm); 1552 case 0x3: 1553 return decodeNeonUTwoMiscReg<NVzipD, NVzipQ>( 1554 q, size, machInst, vd, vm); 1555 case 0x4: --- 952 unchanged lines hidden --- |