fp.isa (7389:714dea5b5298) fp.isa (7392:43b0cd94ced6)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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404 specReg = MISCREG_MVFR0;
405 break;
406 case 8:
407 specReg = MISCREG_FPEXC;
408 break;
409 default:
410 return new Unknown(machInst);
411 }
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 395 unchanged lines hidden (view full) ---

404 specReg = MISCREG_MVFR0;
405 break;
406 case 8:
407 specReg = MISCREG_FPEXC;
408 break;
409 default:
410 return new Unknown(machInst);
411 }
412 return new Vmrs(machInst, rt, (IntRegIndex)specReg);
412 if (rt == 0xf) {
413 CPSR cpsrMask = 0;
414 cpsrMask.n = 1;
415 cpsrMask.z = 1;
416 cpsrMask.c = 1;
417 cpsrMask.v = 1;
418 return new VmrsApsr(machInst, INTREG_CONDCODES,
419 (IntRegIndex)specReg, (uint32_t)cpsrMask);
420 } else {
421 return new Vmrs(machInst, rt, (IntRegIndex)specReg);
422 }
413 }
414 } else {
415 uint32_t vd = (bits(machInst, 7) << 5) |
416 (bits(machInst, 19, 16) << 1);
417 uint32_t index, size;
418 const IntRegIndex rt =
419 (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
420 const bool u = (bits(machInst, 23) == 1);

--- 415 unchanged lines hidden --- 		423 }
424 } else {
425 uint32_t vd = (bits(machInst, 7) << 5) |
426 (bits(machInst, 19, 16) << 1);
427 uint32_t index, size;
428 const IntRegIndex rt =
429 (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
430 const bool u = (bits(machInst, 23) == 1);

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