fp.isa (7369:f71b906540cf) | fp.isa (7370:6fa1e296585d) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 469 unchanged lines hidden (view full) --- 478 decodeVfpData(ExtMachInst machInst) 479 { 480 const uint32_t opc1 = bits(machInst, 23, 20); 481 const uint32_t opc2 = bits(machInst, 19, 16); 482 const uint32_t opc3 = bits(machInst, 7, 6); 483 //const uint32_t opc4 = bits(machInst, 3, 0); 484 switch (opc1 & 0xb /* 1011 */) { 485 case 0x0: | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 469 unchanged lines hidden (view full) --- 478 decodeVfpData(ExtMachInst machInst) 479 { 480 const uint32_t opc1 = bits(machInst, 23, 20); 481 const uint32_t opc2 = bits(machInst, 19, 16); 482 const uint32_t opc3 = bits(machInst, 7, 6); 483 //const uint32_t opc4 = bits(machInst, 3, 0); 484 switch (opc1 & 0xb /* 1011 */) { 485 case 0x0: |
486 return new WarnUnimplemented("vmla, vmls", machInst); | 486 if (bits(machInst, 6) == 0) { 487 uint32_t vd; 488 uint32_t vm; 489 uint32_t vn; 490 if (bits(machInst, 8) == 0) { 491 vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1); 492 vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1); 493 vn = bits(machInst, 7) | (bits(machInst, 19, 16) << 1); 494 return new VmlaS(machInst, (IntRegIndex)vd, 495 (IntRegIndex)vn, (IntRegIndex)vm); 496 } else { 497 vd = (bits(machInst, 22) << 5) | 498 (bits(machInst, 15, 12) << 1); 499 vm = (bits(machInst, 5) << 5) | 500 (bits(machInst, 3, 0) << 1); 501 vn = (bits(machInst, 7) << 5) | 502 (bits(machInst, 19, 16) << 1); 503 return new VmlaD(machInst, (IntRegIndex)vd, 504 (IntRegIndex)vn, (IntRegIndex)vm); 505 } 506 } else { 507 uint32_t vd; 508 uint32_t vm; 509 uint32_t vn; 510 if (bits(machInst, 8) == 0) { 511 vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1); 512 vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1); 513 vn = bits(machInst, 7) | (bits(machInst, 19, 16) << 1); 514 return new VmlsS(machInst, (IntRegIndex)vd, 515 (IntRegIndex)vn, (IntRegIndex)vm); 516 } else { 517 vd = (bits(machInst, 22) << 5) | 518 (bits(machInst, 15, 12) << 1); 519 vm = (bits(machInst, 5) << 5) | 520 (bits(machInst, 3, 0) << 1); 521 vn = (bits(machInst, 7) << 5) | 522 (bits(machInst, 19, 16) << 1); 523 return new VmlsD(machInst, (IntRegIndex)vd, 524 (IntRegIndex)vn, (IntRegIndex)vm); 525 } 526 } |
487 case 0x2: 488 if ((opc3 & 0x1) == 0) { 489 uint32_t vd; 490 uint32_t vm; 491 uint32_t vn; 492 if (bits(machInst, 8) == 0) { 493 vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1); 494 vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1); --- 207 unchanged lines hidden --- | 527 case 0x2: 528 if ((opc3 & 0x1) == 0) { 529 uint32_t vd; 530 uint32_t vm; 531 uint32_t vn; 532 if (bits(machInst, 8) == 0) { 533 vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1); 534 vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1); --- 207 unchanged lines hidden --- |