fp.isa (7323:3b28dfe5a13a) fp.isa (7326:299edea3e5a2)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 241 unchanged lines hidden (view full) ---

250 // A8-594
251 return new WarnUnimplemented("vdup", machInst);
252 }
253 } else if (l == 1 && c == 0) {
254 if (a == 0) {
255 // A8-648
256 return new WarnUnimplemented("vmov", machInst);
257 } else if (a == 7) {
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 241 unchanged lines hidden (view full) ---

250 // A8-594
251 return new WarnUnimplemented("vdup", machInst);
252 }
253 } else if (l == 1 && c == 0) {
254 if (a == 0) {
255 // A8-648
256 return new WarnUnimplemented("vmov", machInst);
257 } else if (a == 7) {
258 // A8-658
259 // B6-27
260 return new WarnUnimplemented("vmrs", machInst);
258 const IntRegIndex rt =
259 (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
260 uint32_t specReg = bits(machInst, 19, 16);
261 switch (specReg) {
262 case 0:
263 specReg = MISCREG_FPSID;
264 break;
265 case 1:
266 specReg = MISCREG_FPSCR;
267 break;
268 case 6:
269 specReg = MISCREG_MVFR1;
270 break;
271 case 7:
272 specReg = MISCREG_MVFR0;
273 break;
274 case 8:
275 specReg = MISCREG_FPEXC;
276 break;
277 default:
278 return new Unknown(machInst);
279 }
280 return new Vmrs(machInst, rt, (IntRegIndex)specReg);
261 }
262 } else {
263 // A8-646
264 return new WarnUnimplemented("vmov", machInst);
265 }
266 return new Unknown(machInst);
267 }
268 '''
269}};
281 }
282 } else {
283 // A8-646
284 return new WarnUnimplemented("vmov", machInst);
285 }
286 return new Unknown(machInst);
287 }
288 '''
289}};