fp.isa (7321:d0fdf3452086) fp.isa (7323:3b28dfe5a13a)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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219 (machInst.thumb == 0 && machInst.condCode == 0xf)) {
220 return new Unknown(machInst);
221 }
222 if (l == 0 && c == 0) {
223 if (a == 0) {
224 // A8-648
225 return new WarnUnimplemented("vmov", machInst);
226 } else if (a == 0x7) {
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 210 unchanged lines hidden (view full) ---

219 (machInst.thumb == 0 && machInst.condCode == 0xf)) {
220 return new Unknown(machInst);
221 }
222 if (l == 0 && c == 0) {
223 if (a == 0) {
224 // A8-648
225 return new WarnUnimplemented("vmov", machInst);
226 } else if (a == 0x7) {
227 // A8-660
228 // B6-29
229 return new WarnUnimplemented("vmsr", machInst);
227 const IntRegIndex rt =
228 (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
229 uint32_t specReg = bits(machInst, 19, 16);
230 switch (specReg) {
231 case 0:
232 specReg = MISCREG_FPSID;
233 break;
234 case 1:
235 specReg = MISCREG_FPSCR;
236 break;
237 case 8:
238 specReg = MISCREG_FPEXC;
239 break;
240 default:
241 return new Unknown(machInst);
242 }
243 return new Vmsr(machInst, (IntRegIndex)specReg, rt);
230 }
231 } else if (l == 0 && c == 1) {
232 if (bits(a, 2) == 0) {
233 // A8-644
234 return new WarnUnimplemented("vmov", machInst);
235 } else if (bits(b, 1) == 0) {
236 // A8-594
237 return new WarnUnimplemented("vdup", machInst);

--- 18 unchanged lines hidden --- 		244 }
245 } else if (l == 0 && c == 1) {
246 if (bits(a, 2) == 0) {
247 // A8-644
248 return new WarnUnimplemented("vmov", machInst);
249 } else if (bits(b, 1) == 0) {
250 // A8-594
251 return new WarnUnimplemented("vdup", machInst);

--- 18 unchanged lines hidden ---