fp.isa (12595:b5a51007feac) fp.isa (13120:690a0db8e58b)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2011,2016 ARM Limited
3// Copyright (c) 2010-2011, 2016-2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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2396 }
2397 }
2398 break;
2399 case 0xb:
2400 if ((opc3 & 0x1) == 0) {
2401 const uint32_t baseImm =
2402 bits(machInst, 3, 0) | (bits(machInst, 19, 16) << 4);
2403 if (single) {
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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2396 }
2397 }
2398 break;
2399 case 0xb:
2400 if ((opc3 & 0x1) == 0) {
2401 const uint32_t baseImm =
2402 bits(machInst, 3, 0) | (bits(machInst, 19, 16) << 4);
2403 if (single) {
2404 uint32_t imm = vfp_modified_imm(baseImm, false);
2404 uint32_t imm = vfp_modified_imm(baseImm, FpDataType::Fp32);
2405 return decodeVfpRegImmOp<VmovImmS>(
2406 machInst, vd, imm, false);
2407 } else {
2405 return decodeVfpRegImmOp<VmovImmS>(
2406 machInst, vd, imm, false);
2407 } else {
2408 uint64_t imm = vfp_modified_imm(baseImm, true);
2408 uint64_t imm = vfp_modified_imm(baseImm, FpDataType::Fp64);
2409 return decodeVfpRegImmOp<VmovImmD>(
2410 machInst, vd, imm, true);
2411 }
2412 }
2413 switch (opc2) {
2414 case 0x0:
2415 if (opc3 == 1) {
2416 if (single) {

--- 244 unchanged lines hidden --- 		2409 return decodeVfpRegImmOp<VmovImmD>(
2410 machInst, vd, imm, true);
2411 }
2412 }
2413 switch (opc2) {
2414 case 0x0:
2415 if (opc3 == 1) {
2416 if (single) {

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