156c156
< const bool single = bits(machInst, 22);
---
> const bool single = (bits(machInst, 8) == 0);
180c180
< if (bits(machInst, 8) == 0) {
---
> if (single) {
225c225,246
< return new WarnUnimplemented("vldr", machInst);
---
> const bool up = (bits(machInst, 23) == 1);
> const uint32_t imm = bits(machInst, 7, 0) << 2;
> RegIndex vd;
> if (single) {
> vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) |
> (bits(machInst, 22)));
> if (up) {
> return new %(vldr_us)s(machInst, vd, rn, up, imm);
> } else {
> return new %(vldr_s)s(machInst, vd, rn, up, imm);
> }
> } else {
> vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) |
> (bits(machInst, 22) << 5));
> if (up) {
> return new %(vldr_ud)s(machInst, vd, vd + 1,
> rn, up, imm);
> } else {
> return new %(vldr_d)s(machInst, vd, vd + 1,
> rn, up, imm);
> }
> }
230c251,256
< '''
---
> ''' % {
> "vldr_us" : "VLDR_" + loadImmClassName(False, True, False),
> "vldr_s" : "VLDR_" + loadImmClassName(False, False, False),
> "vldr_ud" : "VLDR_" + loadDoubleImmClassName(False, True, False),
> "vldr_d" : "VLDR_" + loadDoubleImmClassName(False, False, False)
> }