fp.isa (7392:43b0cd94ced6) | fp.isa (7394:bd00fbc41bb1) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 314 unchanged lines hidden (view full) --- 323 uint32_t specReg = bits(machInst, 19, 16); 324 switch (specReg) { 325 case 0: 326 specReg = MISCREG_FPSID; 327 break; 328 case 1: 329 specReg = MISCREG_FPSCR; 330 break; | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 314 unchanged lines hidden (view full) --- 323 uint32_t specReg = bits(machInst, 19, 16); 324 switch (specReg) { 325 case 0: 326 specReg = MISCREG_FPSID; 327 break; 328 case 1: 329 specReg = MISCREG_FPSCR; 330 break; |
331 case 6: 332 specReg = MISCREG_MVFR1; 333 break; 334 case 7: 335 specReg = MISCREG_MVFR0; 336 break; |
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331 case 8: 332 specReg = MISCREG_FPEXC; 333 break; 334 default: 335 return new Unknown(machInst); 336 } 337 return new Vmsr(machInst, (IntRegIndex)specReg, rt); 338 } --- 507 unchanged lines hidden --- | 337 case 8: 338 specReg = MISCREG_FPEXC; 339 break; 340 default: 341 return new Unknown(machInst); 342 } 343 return new Vmsr(machInst, (IntRegIndex)specReg, rt); 344 } --- 507 unchanged lines hidden --- |