fp.isa (7366:4efa4733e66e) | fp.isa (7367:8c3ec534f022) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 496 unchanged lines hidden (view full) --- 505 return new VmulD(machInst, (IntRegIndex)vd, 506 (IntRegIndex)vn, (IntRegIndex)vm); 507 } 508 } 509 case 0x1: 510 return new WarnUnimplemented("vnmla, vnmls, vnmul", machInst); 511 case 0x3: 512 if ((opc3 & 0x1) == 0) { | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 496 unchanged lines hidden (view full) --- 505 return new VmulD(machInst, (IntRegIndex)vd, 506 (IntRegIndex)vn, (IntRegIndex)vm); 507 } 508 } 509 case 0x1: 510 return new WarnUnimplemented("vnmla, vnmls, vnmul", machInst); 511 case 0x3: 512 if ((opc3 & 0x1) == 0) { |
513 return new WarnUnimplemented("vadd", machInst); | 513 uint32_t vd; 514 uint32_t vm; 515 uint32_t vn; 516 if (bits(machInst, 8) == 0) { 517 vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1); 518 vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1); 519 vn = bits(machInst, 7) | (bits(machInst, 19, 16) << 1); 520 return new VaddS(machInst, (IntRegIndex)vd, 521 (IntRegIndex)vn, (IntRegIndex)vm); 522 } else { 523 vd = (bits(machInst, 22) << 5) | 524 (bits(machInst, 15, 12) << 1); 525 vm = (bits(machInst, 5) << 5) | 526 (bits(machInst, 3, 0) << 1); 527 vn = (bits(machInst, 7) << 5) | 528 (bits(machInst, 19, 16) << 1); 529 return new VaddD(machInst, (IntRegIndex)vd, 530 (IntRegIndex)vn, (IntRegIndex)vm); 531 } |
514 } else { 515 return new WarnUnimplemented("vsub", machInst); 516 } 517 case 0x8: 518 if ((opc3 & 0x1) == 0) { 519 return new WarnUnimplemented("vdiv", machInst); 520 } 521 break; --- 112 unchanged lines hidden --- | 532 } else { 533 return new WarnUnimplemented("vsub", machInst); 534 } 535 case 0x8: 536 if ((opc3 & 0x1) == 0) { 537 return new WarnUnimplemented("vdiv", machInst); 538 } 539 break; --- 112 unchanged lines hidden --- |