1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2011, 2016-2019 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
--- 2525 unchanged lines hidden (view full) ---
2534 return decodeVfpRegRegRegOp<VsubS>(
2535 machInst, vd, vn, vm, false);
2536 } else {
2537 return decodeVfpRegRegRegOp<VsubD>(
2538 machInst, vd, vn, vm, true);
2539 }
2540 }
2541 case 0x8:
2542 if ((opc3 & 0x1) == 0) {
2543 if (single) {
2544 return decodeVfpRegRegRegOp<VdivS>(
2545 machInst, vd, vn, vm, false);
2546 } else {
2547 return decodeVfpRegRegRegOp<VdivD>(
2548 machInst, vd, vn, vm, true);
2549 }
--- 302 unchanged lines hidden ---
2
3// Copyright (c) 2010-2011, 2016-2019 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
--- 2525 unchanged lines hidden (view full) ---
2534 return decodeVfpRegRegRegOp<VsubS>(
2535 machInst, vd, vn, vm, false);
2536 } else {
2537 return decodeVfpRegRegRegOp<VsubD>(
2538 machInst, vd, vn, vm, true);
2539 }
2540 }
2541 case 0x8:
2542 if ((opc3 & 0x1) == 0) {
2543 if (single) {
2544 return decodeVfpRegRegRegOp<VdivS>(
2545 machInst, vd, vn, vm, false);
2546 } else {
2547 return decodeVfpRegRegRegOp<VdivD>(
2548 machInst, vd, vn, vm, true);
2549 }
--- 302 unchanged lines hidden ---