breakpoint.isa (12616:4b463b4dc098) breakpoint.isa (12789:b28b286fa57d)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010,2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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40//
41// Authors: Stephen Hines
42
43////////////////////////////////////////////////////////////////////
44//
45// Breakpoint instructions
46//
47
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010,2018 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 31 unchanged lines hidden (view full) ---

40//
41// Authors: Stephen Hines
42
43////////////////////////////////////////////////////////////////////
44//
45// Breakpoint instructions
46//
47
48output header {{
49 /**
50 * Static instruction class for Breakpoint (illegal) instructions.
51 * These cause simulator termination if they are executed in a
52 * non-speculative mode. This is a leaf class.
53 */
54 class Breakpoint : public ArmStaticInst
55 {
56 public:
57 /// Constructor
58 Breakpoint(ExtMachInst _machInst)
59 : ArmStaticInst("Breakpoint", _machInst, No_OpClass)
60 {
61 // don't call execute() (which panics) if we're on a
62 // speculative path
63 flags[IsNonSpeculative] = true;
64 }
65
66 Fault execute(ExecContext *, Trace::InstRecord *) const override;
67
68 std::string
69 generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
70 };
71}};
72
73output decoder {{
74 std::string
75 Breakpoint::generateDisassembly(Addr pc, const SymbolTable *symtab) const
76 {
77 return csprintf("%-10s (inst 0x%x)", "Breakpoint", machInst);
78 }
79}};
80
81output exec {{
82 Fault
83 Breakpoint::execute(ExecContext *xc, Trace::InstRecord *traceData) const
84 {
85 return std::make_shared<PrefetchAbort>(xc->pcState().pc(),
86 ArmFault::DebugEvent);
87 }
88}};
89
90def format ArmBkptHlt() {{
91 decode_block = '''
92 {
93 if (bits(machInst, 21)) {
48def format ArmBkptHlt() {{
49 decode_block = '''
50 {
51 if (bits(machInst, 21)) {
94 return new Breakpoint(machInst);
52 return new BkptInst(machInst);
95 } else {
96 uint32_t imm16 = (bits(machInst, 19, 8) << 4) |
97 (bits(machInst, 3, 0) << 0);
98 return new Hlt(machInst, imm16);
99 }
100 }
101 '''
102}};
103
53 } else {
54 uint32_t imm16 = (bits(machInst, 19, 8) << 4) |
55 (bits(machInst, 3, 0) << 0);
56 return new Hlt(machInst, imm16);
57 }
58 }
59 '''
60}};
61