branch.isa (7344:82a4e24e7fad) | branch.isa (7419:10e7f0f18461) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 158 unchanged lines hidden (view full) --- 167 return new Cps(machInst, mods); 168 } else if ((op2 & 0xf0) == 0xf0) { 169 return new WarnUnimplemented("dbg", machInst); 170 } else { 171 switch (op2) { 172 case 0x0: 173 return new NopInst(machInst); 174 case 0x1: | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 158 unchanged lines hidden (view full) --- 167 return new Cps(machInst, mods); 168 } else if ((op2 & 0xf0) == 0xf0) { 169 return new WarnUnimplemented("dbg", machInst); 170 } else { 171 switch (op2) { 172 case 0x0: 173 return new NopInst(machInst); 174 case 0x1: |
175 return new WarnUnimplemented("yield", machInst); | 175 return new YieldInst(machInst); |
176 case 0x2: | 176 case 0x2: |
177 return new WarnUnimplemented("wfe", machInst); | 177 return new WfeInst(machInst); |
178 case 0x3: | 178 case 0x3: |
179 return new WarnUnimplemented("wfi", machInst); | 179 return new WfiInst(machInst); |
180 case 0x4: | 180 case 0x4: |
181 return new WarnUnimplemented("sev", machInst); | 181 return new SevInst(machInst); |
182 default: 183 break; 184 } 185 } 186 break; 187 } 188 case 0x3b: 189 { --- 93 unchanged lines hidden --- | 182 default: 183 break; 184 } 185 } 186 break; 187 } 188 case 0x3b: 189 { --- 93 unchanged lines hidden --- |