branch.isa (7204:8ed494406e30) branch.isa (7248:f5563135de40)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 143 unchanged lines hidden (view full) ---

152 const uint32_t op2 = bits(machInst, 7, 0);
153 if (op1 != 0) {
154 return new WarnUnimplemented("cps", machInst);
155 } else if ((op2 & 0xf0) == 0xf0) {
156 return new WarnUnimplemented("dbg", machInst);
157 } else {
158 switch (op2) {
159 case 0x0:
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 143 unchanged lines hidden (view full) ---

152 const uint32_t op2 = bits(machInst, 7, 0);
153 if (op1 != 0) {
154 return new WarnUnimplemented("cps", machInst);
155 } else if ((op2 & 0xf0) == 0xf0) {
156 return new WarnUnimplemented("dbg", machInst);
157 } else {
158 switch (op2) {
159 case 0x0:
160 return new WarnUnimplemented("nop", machInst);
160 return new NopInst(machInst);
161 case 0x1:
162 return new WarnUnimplemented("yield", machInst);
163 case 0x2:
164 return new WarnUnimplemented("wfe", machInst);
165 case 0x3:
166 return new WarnUnimplemented("wfi", machInst);
167 case 0x4:
168 return new WarnUnimplemented("sev", machInst);

--- 93 unchanged lines hidden --- 		161 case 0x1:
162 return new WarnUnimplemented("yield", machInst);
163 case 0x2:
164 return new WarnUnimplemented("wfe", machInst);
165 case 0x3:
166 return new WarnUnimplemented("wfi", machInst);
167 case 0x4:
168 return new WarnUnimplemented("sev", machInst);

--- 93 unchanged lines hidden ---