branch.isa (7153:6ce0bf0ddaf3) branch.isa (7154:1fa6d1db1f32)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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79}};
80
81def format ArmBlxReg() {{
82 decode_block = '''
83 return new BlxReg(machInst, (IntRegIndex)(uint32_t)bits(machInst, 3, 0),
84 (ConditionCode)(uint32_t)machInst.condCode);
85 '''
86}};
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 70 unchanged lines hidden (view full) ---

79}};
80
81def format ArmBlxReg() {{
82 decode_block = '''
83 return new BlxReg(machInst, (IntRegIndex)(uint32_t)bits(machInst, 3, 0),
84 (ConditionCode)(uint32_t)machInst.condCode);
85 '''
86}};
87
88def format Thumb16CondBranchAndSvc() {{
89 decode_block = '''
90 if (bits(machInst, 11, 9) != 0x7) {
91 return new B(machInst, sext<9>(bits(machInst, 7, 0) << 1),
92 (ConditionCode)(uint32_t)bits(machInst, 11, 8));
93 } else if (bits(machInst, 8)) {
94 return new WarnUnimplemented("svc", machInst);
95 } else {
96 // This space will not be allocated in the future.
97 return new WarnUnimplemented("unimplemented", machInst);
98 }
99 '''
100}};
101
102def format Thumb16UncondBranch() {{
103 decode_block = '''
104 return new B(machInst, sext<12>(bits(machInst, 10, 0) << 1), COND_UC);
105 '''
106}};
107
108def format Thumb32 BranchesAndMiscCtrl() {{
109 decode_block = '''
110 return new WarnUnimplemented("Branches_and_miscellaneous_control",
111 machInst);
112 '''
113}};