branch.isa (10037:5cac77888310) branch.isa (12248:858685d552f6)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010, 2012-2013 ARM Limited
3// Copyright (c) 2010,2012-2013,2017 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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242 } else {
243 if (r) {
244 return new MrsSpsr(machInst, rd);
245 } else {
246 return new MrsCpsr(machInst, rd);
247 }
248 }
249 }
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated

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242 } else {
243 if (r) {
244 return new MrsSpsr(machInst, rd);
245 } else {
246 return new MrsCpsr(machInst, rd);
247 }
248 }
249 }
250 case 0xfe:
250 case 0x7e:
251 {
252 uint32_t imm16 = (bits(machInst, 19, 16) << 12) |
253 (bits(machInst, 11, 0) << 0);
254 return new Hvc(machInst, imm16);
255 }
256 }
257 break;
258 }

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251 {
252 uint32_t imm16 = (bits(machInst, 19, 16) << 12) |
253 (bits(machInst, 11, 0) << 0);
254 return new Hvc(machInst, imm16);
255 }
256 }
257 break;
258 }

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